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dc.contributor.authorKer, MDen_US
dc.contributor.authorHsu, KCen_US
dc.date.accessioned2014-12-08T15:40:21Z-
dc.date.available2014-12-08T15:40:21Z-
dc.date.issued2003-09-01en_US
dc.identifier.issn1530-4388en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TDMR.2003.815192en_US
dc.identifier.urihttp://hdl.handle.net/11536/27557-
dc.description.abstractTurn-on efficiency is the main concern for silicon-controlled rectifier (SCR) devices used as on-chip electrostatic discharge (ESD) protection circuit, especially in deep sub-quarter-micron CMOS processes with much thinner gate oxide. A novel double-triggered technique is proposed to speed up the turn-on speed of SCR devices for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide in sub-quarter-micron CMOS processes. From the experimental results, the switching voltage and turn-on time of such double-triggered SCR (DT_SCR) device has been confirmed to be significantly reduced by this double-triggered technique.en_US
dc.language.isoen_USen_US
dc.subjectdouble-triggered techniqueen_US
dc.subjectelectrostatic discharge (ESD)en_US
dc.subjectESD protection circuiten_US
dc.subjectsilicon-controlled rectifier (SCR)en_US
dc.titleSCR device with double-triggered technique for on-chip ESD protection in sub-quarter-micron silicided CMOS processesen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TDMR.2003.815192en_US
dc.identifier.journalIEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITYen_US
dc.citation.volume3en_US
dc.citation.issue3en_US
dc.citation.spage58en_US
dc.citation.epage68en_US
dc.contributor.department電機學院zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000187434800001-
dc.citation.woscount16-
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