標題: An efficient VLSI implementation of the discrete wavelet transform using embedded instruction codes for symmetric filters
作者: Wu, BF
Hu, YQ
電控工程研究所
Institute of Electrical and Control Engineering
關鍵字: two-dimensional discrete wavelet transform;VLSI
公開日期: 1-Sep-2003
摘要: This work presents a VLSI design rule, namely, an embedded instruction code (EIC), for the discrete wavelet transform (DWT). Our approach derives from the essential computations of DWT, and we establish a set of multiplication instructions, MUL,, and the addition instruction, ADD. In addition, we propose a parallel arithmetic logic unit (PALU) with two multipliers and four adders, called 2M4A. With these requirements, the DWT computation paths can be calculated more efficiently with limited PALUs. Furthermore, since the EIC is operated under the PALU, the number of needed inner registers depends on the wavelet filters' length. Besides, the boundary problem of DWT has also been resolved by the symmetric extension. Moreover, the two-dimensional inverse DWT (2-D IDWT) can be completed using the same PALU for 2-D DWT; the only changes needed to be made are the instruction codes and coefficients. Our chip supports up to six levels of decomposition and versatile image specifications, e.g., VGA, MPEG-1, MPEG-2 and 1024 x 1024 image sizes.
URI: http://dx.doi.org/10.1109/TCSVT.2003.816509
http://hdl.handle.net/11536/27585
ISSN: 1051-8215
DOI: 10.1109/TCSVT.2003.816509
期刊: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY
Volume: 13
Issue: 9
起始頁: 936
結束頁: 943
Appears in Collections:Articles


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