標題: Improvement in retention time of metal-ferroelectric-metal-insulator-semiconductor structures using MgO doped Ba0.7Sr0.3TiO3 insulator layer
作者: Tseng, TY
Lee, SY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 4-Aug-2003
摘要: We report the results of the fabrication and characterization of Pt/Bi3.35La0.85Ti3O12 (BLT)/LaNiO3 (LNO)/Ba0.7Sr0.3TiO3 (BST)/Si metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structures for ferroelectric memory field effect transistor applications. The BLT films were deposited on LNO/BST/Si using the metalorganic decomposition method and annealed by rapid thermal annealing (RTA) process at 600 degreesC for 3 min. The ratio of remanent polarization to saturation polarization (P-r/P-s) increases with reducing area ratio, A(F)/A(I). A large memory window of 3.1 V can be obtained for a small A(F)/A(I) ratio. By the utilization of 5 mol % MgO doped BST insulator layer, LNO bottom electrode layer for BLT, and small area ratio, A(F)/A(I)=1/12 in the MFMIS structure, large P-r/P-s ratio in BLT film and low leakage current and good capacitance matching of the ferroelectric and the insulator in the MFMIS structures have been achieved and, hence, long data retention time >10(6) s has been obtained in this study. Experimental results demonstrate the significant progress in increase of the retention time of these structures, which make them attractive for practical ferroelectric memory field effect transistor applications. (C) 2003 American Institute of Physics.
URI: http://dx.doi.org/10.1063/1.1597412
http://hdl.handle.net/11536/27646
ISSN: 0003-6951
DOI: 10.1063/1.1597412
期刊: APPLIED PHYSICS LETTERS
Volume: 83
Issue: 5
起始頁: 981
結束頁: 983
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