Nanoscale Multigate TiN Metal Nanocrystal Memory Using High-k Blocking Dielectric and High-Work-Function Gate Electrode Integrated on Silcon-on-Insulator Substrate

Abstract

In this study, a charge-trapping-layer-engineered nanoscale n-channel trigate TiN nanocrystal nonvolatile memory was successfully fabricated on silicon-on-insulator (SOI) wafer. An Al(2)O(3) high-k blocking dielectric layer and a P(+) polycrystalline silicon gate electrode were used to obtain low operation voltage and suppress the back-side injection effect, respectively. TiN nanocrystals were formed by annealing TiN/Al(2)O(3) nanolaminates deposited by an atomic layer deposition system. The memory characteristics of various samples with different TiN wetting layer thicknesses, post-deposition annealing times, and blocking oxide thicknesses were also investigated. The sample with a thicker wetting layer exhibited a much larger memory window than other samples owing to its larger nanocrystal size. Good retention with a mere 12% charge loss for up to 10 years and high endurance were also obtained. Furthermore, gate disturbance and read disturbance were measured with very small charge migrations after a 10(3) s stressing bias. (C) 2009 The Japan Society of Applied Physics