標題: Self-aligned fabrication of thin-film transistors with field-induced drain
作者: Yu, CM
Lin, HC
Lin, CY
Yeh, KL
Huang, TY
Lei, TF
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: thin-film transistor;field-induced drain;leakage
公開日期: 1-Aug-2002
摘要: Thin-film transistor (TFT) devices with either a top or a bottom sub-gate were fabricated and characterized. The top sub-gate scheme allows the self-aligned formation of main-gate with respect to the sub-gate. On the other hand, the bottom sub-gate scheme features a self-aligned field-induced drain with a sidewall spacer located on its top to set the effective field-induction-drain (FID) length. Unlike the conventional TFTs, the FID serves to distribute the high drain electric field and thereby eliminates gate-induced drain leakage-like off-state leakage current. Superior device performance is realized with the bottom sub-gate structure. (C) 2002 Elsevier Science Ltd. All rights reserved.
URI: http://dx.doi.org/10.1016/S0038-1101(02)00047-3
http://hdl.handle.net/11536/28602
ISSN: 0038-1101
DOI: 10.1016/S0038-1101(02)00047-3
期刊: SOLID-STATE ELECTRONICS
Volume: 46
Issue: 8
起始頁: 1091
結束頁: 1095
Appears in Collections:Conferences Paper


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