标题: | A novel all-binary motion estimation (ABME) with optimized hardware architectures |
作者: | Luo, JH Wang, CN Chiang, TH 资讯科学与工程研究所 电子工程学系及电子研究所 Institute of Computer Science and Engineering Department of Electronics Engineering and Institute of Electronics |
关键字: | all-binary motion estimation (ABME);binary motion estimation;fast motion estimation;fast motion search;multiresolution |
公开日期: | 1-八月-2002 |
摘要: | We present a fast motion estimation algorithm using only binary representation, which is desirable for both embedded system and hardware implementation with parallel architectures. The key algorithm distinction is that only the high-frequency spectrum is used. Our experimental results show that it provides excellent performance at both low and high bit rates. Because of its binary-only representation, the proposed algorithm offers low computational complexity and low memory bandwidth consumption. For multimedia-embedded system design, we further investigated specific implementation techniques for several well-known hardware platforms including Intel x86 processors, single-instruction multiple-data processors, and systolic array circuit design. The systolic array architecture requires only single memory access for both the reference and current frames from the on-chip memory. Such an implementation provides an optimized solution with great throughput, while the quality is maintained. Finally, we show that our binarization methods are closely coupled to the accuracy of binary motion estimation algorithms. The binarization and coding efficiencies can be improved using various filters and binarization methods. |
URI: | http://dx.doi.org/10.1109/TCSVT.2002.800859 http://hdl.handle.net/11536/28627 |
ISSN: | 1051-8215 |
DOI: | 10.1109/TCSVT.2002.800859 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY |
Volume: | 12 |
Issue: | 8 |
起始页: | 700 |
结束页: | 712 |
显示于类别: | Articles |
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