標題: Post-implantation thermal annealing effect on the gate oxide of triple-well-structure
作者: Hsu, WC
Liang, MS
Lin, CT
Chen, MC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: triple well;high-energy ion implantation;thermal annealing;breakdown voltage;interface state density
公開日期: 1-May-2002
摘要: In this work, we investigate the effect of post-implantation thermal annealing on the quality of thin gate oxides grown on MeV ion-implanted Si substrates for the triple-well structure. The thin gate oxide grown on the MeV ion-implanted Si substrates without post-implantation thermal annealing may contain pinholes, leading to oxide failure at a very low voltage; in addition, the gate oxide has a higher density of interface states, which may result in a low breakdown voltage. With appropriate post-implantation thermal annealing before the growth of the gate oxide, e.g., 1000degreesC for 30 min under the MeV implantation conditions employed in this work, the gate oxide is able to regain its integrity in terms of electrical breakdown voltage.
URI: http://dx.doi.org/10.1143/JJAP.41.2878
http://hdl.handle.net/11536/28832
ISSN: 0021-4922
DOI: 10.1143/JJAP.41.2878
期刊: JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
Volume: 41
Issue: 5A
起始頁: 2878
結束頁: 2880
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