標題: Generalized interconnect delay time and crosstalk models: I. Applications of interconnect optimization design
作者: Lee, TGY
Tseng, TY
Wong, SC
Yang, CJ
Liang, MS
Cheng, HC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: closed-form model;interconnect;model;delay;crosstalk;optimization
公開日期: 1-Dec-2001
摘要: New analytical models for estimating the delay time of single line and coupled interconnect for ramp input waveform are derived, The accuracy of the signal delay time and crosstalk noise voltage models for various driver resistances, loading capacitances, and input-ramping rates has also been verified by simulation program with integrated circuit emphasis (SPICE) simulation. Based on the delay and crosstalk models, interconnect optimization design can be discussed thoroughly. The proposed guaranteed-performance interconnect design method is also discussed. These models are useful for performance estimation and layout optimization in VLSI synthesis as well as process optimization in technology development.
URI: http://hdl.handle.net/11536/29211
ISSN: 0021-4922
期刊: JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
Volume: 40
Issue: 12
起始頁: 6686
結束頁: 6693
Appears in Collections:Articles


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