NOVEL TECHNIQUE FOR SIO2 FORMED BY LIQUID-PHASE DEPOSITION FOR LOW-TEMPERATURE PROCESSED POLYSILICON TFT

doi:10.1109/55.225593

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DC 欄位	值	語言
dc.contributor.author	YEH, CF	en_US
dc.contributor.author	LIN, SS	en_US
dc.contributor.author	CHEN, CL	en_US
dc.contributor.author	YANG, YC	en_US
dc.date.accessioned	2014-12-08T15:04:25Z	-
dc.date.available	2014-12-08T15:04:25Z	-
dc.date.issued	1993-08-01	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/55.225593	en_US
dc.identifier.uri	http://hdl.handle.net/11536/2923	-
dc.description.abstract	A novel technique for SiO2 formation by liquid-phase deposition (LPD) at nearly room temperature for low-temperature processed (LTP) polysilicon thin-film transistor (poly-Si TFT) was developed. LPD-SiO2 film with a lower P-etch rate shows its dense structure. LPD-SiO2 also exhibits good electrical characteristics. LTP poly-Si TFT's with LPD-SiO2, as gate insulator have been fabricated and investigated. Their characteristics exhibit sufficient performance for pixel transistor in liquid crystal display (LCD).	en_US
dc.language.iso	en_US	en_US
dc.title	NOVEL TECHNIQUE FOR SIO2 FORMED BY LIQUID-PHASE DEPOSITION FOR LOW-TEMPERATURE PROCESSED POLYSILICON TFT	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/55.225593	en_US
dc.identifier.journal	IEEE ELECTRON DEVICE LETTERS	en_US
dc.citation.volume	14	en_US
dc.citation.issue	8	en_US
dc.citation.spage	403	en_US
dc.citation.epage	405	en_US
dc.contributor.department	電控工程研究所	zh_TW
dc.contributor.department	Institute of Electrical and Control Engineering	en_US
dc.identifier.wosnumber	WOS:A1993LQ00900012	-
dc.citation.woscount	26	-
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