完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wang, HCH | en_US |
dc.contributor.author | Diaz, CH | en_US |
dc.contributor.author | Liew, BK | en_US |
dc.contributor.author | Sun, JYC | en_US |
dc.contributor.author | Wang, TH | en_US |
dc.date.accessioned | 2014-12-08T15:44:34Z | - |
dc.date.available | 2014-12-08T15:44:34Z | - |
dc.date.issued | 2000-12-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/55.887478 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/30092 | - |
dc.description.abstract | This letter presents a deep submicron CMOS process that takes advantage of phosphorus transient enhanced diffusion (TED) to improve the hot carrier reliability of 3.3 V input/output transistors, Arsenic/phosphorus LDI) nMOSFETs with and without TED are fabricated. The TED effects on a LDD junction profile, device substrate current and transconductance degradation are evaluated, Substantial substrate current reduction and hot carrier lifetime improvement for the input/output devices are attained due to a more graded n(-) LDD doping profile by taking advantage of phosphorus TED. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | hot carriers | en_US |
dc.subject | MOS devices | en_US |
dc.subject | transient enhanced diffusion | en_US |
dc.title | Hot carrier reliability improvement by utilizing phosphorus transient enhanced diffusion for input/output devices of deep submicron CMOS technology | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/55.887478 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 21 | en_US |
dc.citation.issue | 12 | en_US |
dc.citation.spage | 598 | en_US |
dc.citation.epage | 600 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000165684000018 | - |
dc.citation.woscount | 9 | - |
顯示於類別: | 期刊論文 |