完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, MJ | en_US |
dc.contributor.author | Kang, TK | en_US |
dc.contributor.author | Huang, HT | en_US |
dc.contributor.author | Liu, CH | en_US |
dc.contributor.author | Chang, YJ | en_US |
dc.contributor.author | Fu, KY | en_US |
dc.date.accessioned | 2014-12-08T15:45:00Z | - |
dc.date.available | 2014-12-08T15:45:00Z | - |
dc.date.issued | 2000-08-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/16.853050 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/30369 | - |
dc.description.abstract | The forward gated-diode monitoring technique can find its potential applications in assessing the filled traps in MOSFET thin oxides, which are subjected to high-field stressing and then followed by hot-electrons filling scheme. Our measurement of the gate voltage shift associated with the forward current peak produces a power lan relation between the filled trap density and the electron stress fluence, indeed in close agreement with that obtained by MOSFET threshold voltage shift. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | gated-diode | en_US |
dc.subject | hot electron | en_US |
dc.subject | MOSFET | en_US |
dc.subject | neutral trap | en_US |
dc.subject | oxide breakdown | en_US |
dc.subject | SILC | en_US |
dc.subject | thin oxide | en_US |
dc.title | Forward gated-diode measurement of filled traps in high-field stressed thin oxides | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/16.853050 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 47 | en_US |
dc.citation.issue | 8 | en_US |
dc.citation.spage | 1682 | en_US |
dc.citation.epage | 1683 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000088531400022 | - |
dc.citation.woscount | 4 | - |
顯示於類別: | 期刊論文 |