High performance 0.1 mu m dynamic threshold MOSFET using indium channel implantation

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DC 欄位	值	語言
dc.contributor.author	Chang, SJ	en_US
dc.contributor.author	Chang, CY	en_US
dc.contributor.author	Chao, TS	en_US
dc.contributor.author	Huang, TY	en_US
dc.date.accessioned	2014-12-08T15:45:36Z	-
dc.date.available	2014-12-08T15:45:36Z	-
dc.date.issued	2000-03-01	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/55.823577	en_US
dc.identifier.uri	http://hdl.handle.net/11536/30686	-
dc.description.abstract	In this letter, we demonstrate a high-performance 0.1 mu m Dynamic Threshold Voltage MOSFET (DTMOS) for ultra-low-voltage (i.e., < 0.7 V) operations. Devices are realized by using super-steep-retrograde indium-channel profile. The steep indium-implanted-channel DTMOS can achieve a large body-effect-factor and a low V-th simutaneously, which results in an excellent performance for the indium-implanted DTMOS.	en_US
dc.language.iso	en_US	en_US
dc.subject	DTMOS	en_US
dc.subject	indium SSR	en_US
dc.title	High performance 0.1 mu m dynamic threshold MOSFET using indium channel implantation	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/55.823577	en_US
dc.identifier.journal	IEEE ELECTRON DEVICE LETTERS	en_US
dc.citation.volume	21	en_US
dc.citation.issue	3	en_US
dc.citation.spage	127	en_US
dc.citation.epage	129	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000085620800011	-
dc.citation.woscount	11	-
顯示於類別：	期刊論文

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