標題: | SEESIM - A FAST SYNCHRONOUS SEQUENTIAL-CIRCUIT FAULT SIMULATOR WITH SINGLE-EVENT EQUIVALENCE |
作者: | WU, CP LEE, CL SHEN, WZ 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | FAULT SIMULATION;SINGLE-EVENT EQUIVALENCE |
公開日期: | 1-四月-1993 |
摘要: | The paper presents a concept of single event equivalence to be used in the sequential circuit fault simulator. The concept dynamically identifies the equivalent faults for a simulated pattern. It combines advantages of the fanout-free region, critical path tracing and the dominator concept, which were applicable only to combinational circuit fault simulation. The implemented fault simulator, SEESIM, based on the concept, demonstrated a performance superior to that of a state-of-the-art concurrent fault simulator, and comparable to that of parallel-pattern single-fault propagation simulators. It requires a minimal amount of memory and, because of its simplicity, can be easily extended to multilogic or higher level simulation. |
URI: | http://hdl.handle.net/11536/3072 |
ISSN: | 0956-3768 |
期刊: | IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS |
Volume: | 140 |
Issue: | 2 |
起始頁: | 101 |
結束頁: | 105 |
顯示於類別: | 期刊論文 |