| 標題: | ELECTRICAL CHARACTERISTICS OF TEXTURED POLYSILICON OXIDE PREPARED BY A LOW-TEMPERATURE WAFER LOADING AND N-2 PREANNEALING PROCESS |
| 作者: | WU, SL LIN, TY LEE, CL LEI, TF 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
| 公開日期: | 1-Mar-1993 |
| 摘要: | A low-temperature wafer loading and N2 preannealing process is used to grow a thin textured polysilicon oxide. The polyoxide grown on the heavily doped polysilicon film exhibits less oxide tunneling leakage current and higher dielectric strength when the top electrode is positively biased. |
| URI: | http://dx.doi.org/10.1109/55.215128 http://hdl.handle.net/11536/3110 |
| ISSN: | 0741-3106 |
| DOI: | 10.1109/55.215128 |
| 期刊: | IEEE ELECTRON DEVICE LETTERS |
| Volume: | 14 |
| Issue: | 3 |
| 起始頁: | 113 |
| 結束頁: | 114 |
| Appears in Collections: | Articles |
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