標題: | CHARACTERIZATION OF ULTRATHIN OXIDE PREPARED BY LOW-TEMPERATURE WAFER LOADING AND NITROGEN PREANNEALING BEFORE OXIDATION |
作者: | WU, SL LEE, CL LEI, TF LIANG, MS 電子工程學系及電子研究所 電控工程研究所 Department of Electronics Engineering and Institute of Electronics Institute of Electrical and Control Engineering |
公開日期: | 15-八月-1992 |
摘要: | In this study, we report a high-performance ultrathin oxide (almost-equal-to 80 angstrom) prepared by a low-temperature wafer loading and N2 preannealing before oxidation. This recipe can reduce native oxide thickness and thermal stress compared to the conventional oxidation recipe. The high-resolution transmission electron microscopy reveals that the SiO2/Si interface is atomically flat, and a thin crystalline-like oxide layer about 7 angstrom exists at the interface. Oxides prepared by the proposed recipe show a very high dielectric breakdown field (greater-than-or-equal-to 16 MV/cm) and a very low interface state density (N(it) almost-equal-to 3 X 10(9) eV-1 cm-2 at midgap). The effective barrier height at cathode derived from the slopes of log(J(g)/E2(ox)2 vs 1/E(ox) and t(bd) vs 1/E(ox) plots is about 3.9 eV, instead of 3.2 eV for the control sample. It also shows a better immunity to the charge trapping and interface state generation under high-field stressing, and superior time-dependent dielectric breakdown characteristics. |
URI: | http://dx.doi.org/10.1063/1.351749 http://hdl.handle.net/11536/3316 |
ISSN: | 0021-8979 |
DOI: | 10.1063/1.351749 |
期刊: | JOURNAL OF APPLIED PHYSICS |
Volume: | 72 |
Issue: | 4 |
起始頁: | 1378 |
結束頁: | 1385 |
顯示於類別: | 期刊論文 |