標題: Front-end amplifier of low-noise and tunable BW/Gain for portable biomedical signal acquisition
作者: Huang, Chun-Chieh
Hung, Shao-Hang
Chung, Jen-Feng
Van, Lan-Da
Lin, Chin-Teng
電控工程研究所
Institute of Electrical and Control Engineering
公開日期: 2008
摘要: We proposed a novel analog circuit design which is suitable for various biomedical signal acquisitions. In addition to the consideration of low power and low noise, the analog front-end integrated Circuit (AFEIC) is presented with design of high common-mode rejection ratio (CMRR) and high power supply ripple rejection ratio (PSRR). It has not only reduced the number of outer components, and enhances a better signal-to-noise ratio (SNR). The chip includes a current-balancing instrumentation amplifier, switched-capacitor filter, non-overlapping clock generator, and a programmable gain amplifier (PGA). It was fabricated by TSMC 0.35 mu m CMOS 2P4M standard process, with CMRR 155 dB CMRR, 131 dB of PSRR+, and 127 dB of PSRR- at 50 Hz. The power consumption is about 142.4 mu W under +/- 1.5V supply.
URI: http://hdl.handle.net/11536/31109
ISBN: 978-1-4244-2078-0
ISSN: 0271-4302
期刊: PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10
起始頁: 2717
結束頁: 2720
Appears in Collections:Conferences Paper