標題: A new I-V model considering the impact-ionization effect initiated by the DIGBL current for the intrinsic n-channel poly-Si TFT's
作者: Chen, HL
Wu, CY
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: DIGBL;impact-ionization;I-V model;poly-Si TFT
公開日期: 1-Apr-1999
摘要: Considering the impact-ionization mechanism occurring in the high drain-bias (V-DS) regime, a new I-V model considering the impact-ionization effect initiated by the drain-induced-grain-barrier-lowering (DIGBL) current has been established for the intrinsic n-channel poly-Si TFT, The simulation results with considering the developed impact-ionization current model are in excellent agreement with the experimental output characteristics of the intrinsic n-channel poly-Si TFT with the mask-gate length ranging from 5 mu m to 40 mu m. In resolving the physical parameters and their underlying operation mechanisms including the grain-barrier height, DIGBL current, and impact-ionization current, the developed I-V model will be beneficial to further understand the underlying physics of the intrinsic poky-Si TFT.
URI: http://dx.doi.org/10.1109/16.753706
http://hdl.handle.net/11536/31412
ISSN: 0018-9383
DOI: 10.1109/16.753706
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 46
Issue: 4
起始頁: 722
結束頁: 728
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