標題: | SERIES RESISTANCE OF SELF-ALIGNED SILICIDED SOURCE DRAIN STRUCTURE |
作者: | TSUI, BY CHEN, MC 電子工程學系及電子研究所 電控工程研究所 Department of Electronics Engineering and Institute of Electronics Institute of Electrical and Control Engineering |
公開日期: | 1-一月-1993 |
摘要: | The external resistance of the self-aligned silicided source/drain structure is examined by two-dimensional simulation considering recession of the contact interface due to the consumption of silicon during the silicidation process. It is observed that the recessed contact interface forces a significant amount of current to flow into the high-resistivity part of the junction resulting in an increase of resistance as large as several hundred ohms-micrometers in comparison with the surface contact structure. The increase scales up with the scale-down of the minimum feature size, and the expected benefits of the SALICIDE structure become diminished for the sub-half-micrometer devices. A simple analytical explanation is proposed. The error between the analytical calculation and the two-dimensional simulation is within 20%. By considering the recession of the contact interface, the reported high external resistance of the short-channel MOSFET's is explained successfully. Different source/drain contact types are compared, and it is concluded that the conventional SALICIDE process should be modified for the sub-half-micrometer devices. |
URI: | http://dx.doi.org/10.1109/16.249444 http://hdl.handle.net/11536/3160 |
ISSN: | 0018-9383 |
DOI: | 10.1109/16.249444 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 40 |
Issue: | 1 |
起始頁: | 197 |
結束頁: | 206 |
顯示於類別: | 期刊論文 |