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dc.contributor.authorChin, Aen_US
dc.contributor.authorLin, BCen_US
dc.contributor.authorChen, WJen_US
dc.contributor.authorLin, YBen_US
dc.contributor.authorThai, Cen_US
dc.date.accessioned2014-12-08T15:47:25Z-
dc.date.available2014-12-08T15:47:25Z-
dc.date.issued1998-11-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.728901en_US
dc.identifier.urihttp://hdl.handle.net/11536/31785-
dc.description.abstractWe have studied the effect of native oxide on thin gate oxide integrity. Much improved leakage current of gate oxide can be obtained by in situ desorbing the native oxide using a HF-vapor treated and H-2 backed process. Furthermore, extremely sharp interface between oxide and Si is obtained, and good oxide reliability is achieved even under a high current density stress of 11 A/cm(2) and a large charge injection of 7.0 x 10(4) C/cm(2). The presence of native oxide will increase the interface roughness, gate oxide leakage current and stress-induced hole trap.en_US
dc.language.isoen_USen_US
dc.titleThe effect of native oxide on thin gate oxide integrityen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/55.728901en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume19en_US
dc.citation.issue11en_US
dc.citation.spage426en_US
dc.citation.epage428en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000076720600010-
dc.citation.woscount26-
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