完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chin, A | en_US |
dc.contributor.author | Lin, BC | en_US |
dc.contributor.author | Chen, WJ | en_US |
dc.contributor.author | Lin, YB | en_US |
dc.contributor.author | Thai, C | en_US |
dc.date.accessioned | 2014-12-08T15:47:25Z | - |
dc.date.available | 2014-12-08T15:47:25Z | - |
dc.date.issued | 1998-11-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/55.728901 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/31785 | - |
dc.description.abstract | We have studied the effect of native oxide on thin gate oxide integrity. Much improved leakage current of gate oxide can be obtained by in situ desorbing the native oxide using a HF-vapor treated and H-2 backed process. Furthermore, extremely sharp interface between oxide and Si is obtained, and good oxide reliability is achieved even under a high current density stress of 11 A/cm(2) and a large charge injection of 7.0 x 10(4) C/cm(2). The presence of native oxide will increase the interface roughness, gate oxide leakage current and stress-induced hole trap. | en_US |
dc.language.iso | en_US | en_US |
dc.title | The effect of native oxide on thin gate oxide integrity | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/55.728901 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 19 | en_US |
dc.citation.issue | 11 | en_US |
dc.citation.spage | 426 | en_US |
dc.citation.epage | 428 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000076720600010 | - |
dc.citation.woscount | 26 | - |
顯示於類別: | 期刊論文 |