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dc.contributor.authorWang, Terry Tai-Juien_US
dc.contributor.authorHung, Shih Weien_US
dc.contributor.authorChuang, Pi Kaien_US
dc.contributor.authorKuo, Cheng Tzuen_US
dc.date.accessioned2014-12-08T15:48:10Z-
dc.date.available2014-12-08T15:48:10Z-
dc.date.issued2010-10-01en_US
dc.identifier.issn0040-6090en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.tsf.2010.04.092en_US
dc.identifier.urihttp://hdl.handle.net/11536/32117-
dc.description.abstractIn this work, the nanostructure-assisted "Al/SiO(2)/Ir-silicide-NCs/SiO(2)/P-Si-sub/Al" stack with iridium silicide nanocrystals (Ir-silicide-NCs) embedded between two SiO(2) layers has been demonstrated in the application of nonvolatile memory for the first time. A significant memory window voltage of 14.2 Vat sweeps of +/- 10 V by capacitance-voltage measurement can be reached, when well-distributed Ir-silicide-NCs are observed in cross-sectional TEM examination. In this case, the trap density is estimated to be about 1.06 x 10(13) cm(-2), indicating a high trapping efficiency stack for nonvolatile memory application. (C) 2010 Elsevier B.V. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleCharge storage characteristics of iridium silicide nanocrystals embedded in SiO(2) matrix for nonvolatile memory applicationen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.tsf.2010.04.092en_US
dc.identifier.journalTHIN SOLID FILMSen_US
dc.citation.volume518en_US
dc.citation.issue24en_US
dc.citation.spage7287en_US
dc.citation.epage7290en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
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