NUMERICAL-ANALYSIS OF THE LOOPING EFFECT IN GAAS-MESFETS

doi:10.1109/16.121679

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	LO, SH	en_US
dc.contributor.author	LEE, CP	en_US
dc.date.accessioned	2014-12-08T15:05:01Z	-
dc.date.available	2014-12-08T15:05:01Z	-
dc.date.issued	1992-02-01	en_US
dc.identifier.issn	0018-9383	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/16.121679	en_US
dc.identifier.uri	http://hdl.handle.net/11536/3532	-
dc.description.abstract	The looping effect in the I(D)-V(D) characteristics of GaAs MESFET's on semi-insulating substrates has been studied using a two-dimensional numerical analysis. Both the transient and the steady-state behaviors of the looping phenomenon are simulated and discussed. Peak voltage- and frequency-dependent behaviors of the looping effect are analyzed. The I(D)-V(D) loop is due to the difference in the distribution of ionized EL2 concentration when the drain voltage rises and falls because of the trapping process of EL2's. The output conductance is also found to be frequency-dependent and is explained by the frequency-dependent modulation of the potential barrier height at the channel/substrate interface due to the drain-voltage variation.	en_US
dc.language.iso	en_US	en_US
dc.title	NUMERICAL-ANALYSIS OF THE LOOPING EFFECT IN GAAS-MESFETS	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/16.121679	en_US
dc.identifier.journal	IEEE TRANSACTIONS ON ELECTRON DEVICES	en_US
dc.citation.volume	39	en_US
dc.citation.issue	2	en_US
dc.citation.spage	242	en_US
dc.citation.epage	249	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	奈米中心	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.contributor.department	Nano Facility Center	en_US
dc.identifier.wosnumber	WOS:A1992GZ71400004	-
dc.citation.woscount	3	-
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