Suppression of boron penetration in p(+) polysilicon gate using Si-B diffusion source

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DC 欄位	值	語言
dc.contributor.author	Chao, TS	en_US
dc.contributor.author	Kuo, CP	en_US
dc.contributor.author	Lei, TF	en_US
dc.contributor.author	Chen, TP	en_US
dc.contributor.author	Huang, TY	en_US
dc.contributor.author	Chang, CY	en_US
dc.date.accessioned	2014-12-08T15:01:07Z	-
dc.date.available	2014-12-08T15:01:07Z	-
dc.date.issued	1998-01-08	en_US
dc.identifier.issn	0013-5194	en_US
dc.identifier.uri	http://hdl.handle.net/11536/35	-
dc.description.abstract	The authors report a novel Si-B diffusion source for doping p(+)-poly-Si gates in pMOSFETs. It is found that B penetration can be effectively suppressed by using this novel process. AU of the electrical properties of the MOS capacitors are significantly improved over those in the conventional BF2+ or B+-implanted samples. This new process is very promising for future surface-channel pMOSFETs.	en_US
dc.language.iso	en_US	en_US
dc.title	Suppression of boron penetration in p(+) polysilicon gate using Si-B diffusion source	en_US
dc.type	Article	en_US
dc.identifier.journal	ELECTRONICS LETTERS	en_US
dc.citation.volume	34	en_US
dc.citation.issue	1	en_US
dc.citation.spage	128	en_US
dc.citation.epage	129	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000071892700088	-
dc.citation.woscount	2	-
顯示於類別：	期刊論文

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