低電壓且高速操作的P通道快閃式記憶體元件性能及可靠性研究

Abstract

快閃式記憶體於近年來已為非揮發性記憶體產品之主流。就一個先進的快閃式記憶體元件來說，高效能(High Performance)與高可靠度(Reliability)是兩個主要的設計考量重點。目前的研究方向主要是朝低電壓操作及高效能的目標前進，為了達到低電壓操作及高效能的需求，我們可以利用改善元件結構或是改變操作方式來達成。本論文即是利用改變操作方式來達到低電壓操作及高效能的目的。

本論文探討P通道快閃式記憶體，我們提出的新式操作方法稱之為順向偏壓輔助汲極熱電子注入 (Forward Bias Assisted Drain Hot Electron Injection, FBADHE)。我們利用一個基極-汲極二極體的順向偏壓(Bias Forward)加速載子，再改變偏壓狀態成為逆向偏壓(Reverse Bias)，這會在二極體的深空乏區中產生更大的碰撞游離 (Impact Ionization)，碰撞產生的大量載子再經由垂直電場的作用而注入至懸浮閘極中，產生臨限電壓的變化，藉以達到改變邏輯儲存的目的。我們將此新的操作方式和汲極崩潰熱電子注入操作 (Drain Avalanche Hot Electron Injection, DAHE)以及一般p通道浮動閘極記憶體常用的價帶-導帶間穿隧模式(Band-to-Band Induced Hot Electron Injection, BBHE)進行操作速度及耐久度(Endurance)、資料保存特性(Data Retention)之比較，並研究各自的優缺點。最後，為了改善P通道快閃式記憶體的最大可靠度問題—汲極擾動(Drain Disturb)，我們提出一種方式：改變陣列結構，利用加上一個微小的負基極(Substrate)電壓在未選擇的元件(Unselected Cell)上，即可大幅度改善汲極擾動問題。

Recently, the flash memory has become the main stream of nonvolatile semiconductor memory products. High performance and reliability are two major issues for the design and manufacturing. The goal of research and development of flash memory cells is to lower the operational voltage and to enhance the performance and reliability. Two approaches are widely used to reach the goal: one is to improve the cell structure, and the other is to change the operation scheme. This thesis is to develop an operation scheme to achieve low voltage, low power consumption, and high reliability.

P-channel flash memories are studies in this work. We propose a new programming scheme to inject electrons into the floating gate. It is called Forward Bias Assisted Drain Hot Electron Injection (FBADHE). First, we apply a small positive drain bias on the Drain-Substrate junction. Then, we apply an appropriate negative bias and switch the junction to reverse-bias. The change of the mode of p-n junction causes more impact ionization in the deep depletion region and more electron-hole pairs are generated. Carriers are then injected into the floating gate via the assistance of vertical electric field due to positive gate voltage. We compare the performance and reliability of this new operation scheme with other traditional ones used on p-channel flash memories: Band-To-Band Induced Hot Electron Injection (BBHE) and Drain Avalanche Hot Electron Injection (DAHE). Finally, in order to improve the major reliability problem of p-channel flash memories, the drain disturb, we propose an alternative way to solve the problem by applying a moderate negative substrate bias on unselected cell, but a new structure is needed.