標題: 在有機薄膜電晶體低溫製程下利用常壓式電漿技術沉積閘極二氧化矽
Low Temperature Processes of Organic Thin-Film Transistor with Gate Dielectric of Silicon Dioxide Deposited by Scanning Atmospheric-Pressure Plasma Technology
作者: 吳永茂
Yung-Mao Wu
張國明
Kow-Ming Chang
電機學院微電子奈米科技產業專班
關鍵字: OTFT;Ogranic thin film transistor
公開日期: 2007
摘要: 我們已經成功地利用大氣壓電漿技術在有機薄膜電晶體低溫製程下沉積閘極矽氧化物,大氣壓電漿技術的優點是可以在一般正常氣壓下沉積矽氧化物,並且也可以應用在低溫製程下適合軟性電子製程條件,在這次研究中,我們的有機薄膜電晶體操作電壓小於-5伏特,利用MIM的結構量出絕緣層在0.5 MV/cm的崩潰電場下漏電流大約在9×10-8 A/cm2,在可携式的電子產品上低的操作電壓與低的漏電流是必要的條件,對於沒有定義有機半導體的主動成區域比有定義有機半導體的主動層區域的漏電流特性大,而且對於有沉積HMDS的元件比沒有沉積HMDS的元件的漏電流特性大。
We have successfully fabricated pentacene-based organic thin film transistor at a low temperature process with silicon oxide as a gate dielectric deposited by atmospheric-pressure plasma technology (APPT). The major merit of scanning atmospheric-pressure plasma technology was low deposition temperature at one standard atmosphere which was suitable for the application of flexible electrons. The organic thin film transistor demonstrated in this study could operate at the voltage less than -5V and the leakage current of silicon oxide dielectric with MIM structure is about 9×10-8A/cm2 at 0.5 MV/cm. The low operation voltage and low leakage current properties are required in portable applications. Leakage current of not define pentacene region is higher than define pentacene region. And leakage current of have HMDS is higher than not have HMDS.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009494514
http://hdl.handle.net/11536/37968
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