N型複晶矽薄膜電晶體在閘極開區域脈衝電壓及汲極直流偏壓下的劣化研究

Abstract

本論文主要的目的是研究N型複晶矽薄膜電晶體在交流訊號操作下的劣化行為。這篇論文不同於先前的研究，其是研究N型複晶矽薄膜電晶體在閘極開區域交流訊號和汲極偏壓操作下的劣化特性，這將更接近實際電路應用上的操作條件。元件的劣化是透過改變不同交流閘極脈衝和汲極直流偏壓的條件來測試。我們觀察到元件的劣化受到汲極直流偏壓、閘極脈衝次數、閘極電壓位準和工作週期所影響。 基於皆有大汲極直流偏壓下的直流閘極操作和交流閘極操作之間的比較，我們提出一個新的指標（VGO）來針對閘極交流訊號作直流閘極電壓的等效估算。由此結果更進一步的發現，直流操作下的熱載子效應（hot carrier effect）和自我發熱效應（self-heating effect）的特徵可對應於有汲極直流偏壓的交流閘極操作。除此新發現外，也清楚知道在交流操作下，不同工作週期與元件劣化之間的關係。即熱載子是主導低閘極電壓範圍操作的劣化，且劣化相對隨著閘極脈衝的工作週期減少明顯增加。然而，在高閘極電壓脈衝造成的劣化是由自我發熱主導，並隨著閘極脈衝工作週期的增加而效應更明顯。根據直流操作和交流操作之間的相似處，在開區域的動態操作下，其複晶矽薄膜電晶體的可靠度便可藉由直流操作條件的可靠度行為做簡單地估算。

The purpose of this thesis is to study the degradation behavior of N-type poly-Si TFTs under AC operation. It differs from previous studies, the characteristics of poly-Si TFTs under gate pulse AC operation in the ON region with drain bias are investigated, which would be much similar to the real operation conditions in applications. Degradation of the device is examined for various conditions of AC gate pulse and DC drain bias. It is observed that the degradation is affected by the drain bias, pulse repetition number, gate pulse level, and duty ratio. On the basis of the comparison between the DC gate stress and AC gate stress both with large Vd, we proposed a new index VGO to estimate the equivalent DC Vg for the gate AC signal. It is further found from the results that the features of hot carrier effect and self-heating effect in DC stress are corresponding to gate AC stress with drain bias. In addition to this new finding, the relation between the device degradation and various duty ratios under AC operation with Vd is also evidenced. That is, hot carriers are the dominant cause of degradation under low-level of the gate voltage (Vgl), and the mobility degradation obviously increases with the decrease in duty ratio. However, the degradation is dominated by self-heating under high-level of the gate pulse (Vgh) and corresponding with the increase in duty ratio. Based on the similarity between the DC stress and AC gate stress, the reliability of poly-Si TFTs dynamically operated in the ON region could be simply estimated from its reliability behavior under DC stress conditions.