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dc.contributor.authorCHEN, MJen_US
dc.date.accessioned2014-12-08T15:05:16Z-
dc.date.available2014-12-08T15:05:16Z-
dc.date.issued1991-05-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://hdl.handle.net/11536/3804-
dc.description.abstractOn a thin-oxide gate-controlled p+-n diode, this work first exhibits experimentally not only the substrate-bias-dependent characteristics of the tunneling leakage current but also the tunneling leakage characteristics independent of the substrate bias. This observation can be reasonably explained by the nature of the modulation of the surface space-charge region over the heavily doped p+ region as well as over the n-type substrate. Based on this work, the original understanding of such tunneling leakage has been improved.en_US
dc.language.isoen_USen_US
dc.titleEFFECT OF BACK-GATE BIAS ON TUNNELING LEAKAGE IN A GATED P+-N DIODEen_US
dc.typeArticleen_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume12en_US
dc.citation.issue5en_US
dc.citation.spage249en_US
dc.citation.epage251en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:A1991FJ40000020-
dc.citation.woscount6-
Appears in Collections:Articles


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