金屬誘發側向結晶複晶矽薄膜電晶體可靠度課題及元件特性之研究

Abstract

在本論文中，我們首先利用金屬誘發側向結晶的方式，製作薄膜電晶體的通道層，且整體製程也都符合低溫薄膜電晶體的製作。同時，我們也應用本實驗室所研發的特殊結構，來探討元件的結晶特性以及可靠度。 利用金屬誘發側向結晶來製作複晶矽，其成長有方向性，因此不同區域的成長時間不同，特性也不一樣，利用此特殊結構的四個通道，可以直接由量測電性圖，觀察其不同成長特性，較傳統方法需要剝除通道層以上結構，並拍攝掃描式電子顯微鏡照片方便許多。另外為了進一步改善元件特性，我們也將元件加以氨電漿處理，除了其一般電特性有所改善之外，在閘極氧化層測試時，經過電漿處理後，也有較好的效果。 可靠度量測係在兩種不同偏壓下進行，VG=0.5VD以及VG=VD。在VG=0.5VD偏壓下，利用改變量測電流的新方法，可以偵測到小區塊(10μm×0.2μm)熱載子引發的傷害，配合上特殊結構子通道的量測，可以更精準敏感的感測出通道內不同區域的傷害。在VG=VD偏壓下，則可能有兩種機制，分別是碰撞電離產生電子電洞對，其電洞注入閘極氧化層，以及閘極氧化層內鍵結不完全的矽原子，在高電壓下，被抽離電子而帶正電，導致臨界電壓(threshold voltage)在高偏壓測試後偏移。

In this study, we have fabricated a special TFT structure which includes four pairs of channels and analyzed its basic characteristics and reliability issues. The devices are fabricated under low temperature and the active channel was made by metal induced lateral crystallization (MILC). Using the special structure, the channel crystallinity can be monitored by electrical measurement instead of pain-taking scanning electron microscope (SEM) pictures. In order to improve the device performance, the devices were also treated under NH3 plasma to passivate defects and enhance the quality of devices. In addition, NH3 plasma also enhances the quality of gate oxide which can resist higher gate voltage stressing. For reliability study, two kinds of hot-carrier effects were studied. In the first place, we study the stress condition under VG=0.5VD. In this case, the special structure can provide better sensitivity in localized region of the channel. Furthermore, by changing the current path of measurement we are able to study hot-carrier effect in depth. Our data show that the small damage region has only edge dimensions of 10μm/0.2μm. In the second place, we study the stress condition under VG=VD. Threshold voltage shifting and degradation of subthreshold swing are observed in this case. There are two responsible mechanisms. The first mechanism is pertaining to holes which are induced by impact ionization and injected into the gate oxide. The second mechanism is pertaining to electrons being extracted from Si in gate oxide under higher gate voltage.