多重通道及多重閘極的金屬誘化側向結晶之複晶矽薄膜電晶體的製作與特性分析

Abstract

在此論文中，我們首先討論對於一系列不同通道寬度及其通道數目之元件圖案相依金屬誘化側向結晶薄膜電晶體(pattern-dependent metal-induced lateral crystallization (PDMILC) polysilicon thin-film transistors)的氨電漿保護效應。在我們的實驗結果中顯示：經過氨電漿保護之元件擁有較高之場效載子移動率（84.63 cm2/Vs）、較高之開關電流比（>106）、較為陡峭之次臨界斜率（230 mV/decade），此乃由於氨電漿中的氫原子將可有效的填補複晶矽邊界之懸浮鍵以及堆積氮原子在二氧化矽/複晶矽表面，並且隨著通道數目的增加，由於受氨電漿保護的接觸面積也跟著增加，以致於在十條奈米線（每條寬度為67奈米）的通道元件將有優於其他結構的元件特性。另外，在此論文當中我們亦討論到利用多重閘極(multi-gate)配合多條奈米線通道之圖案相依金屬誘化側向結晶薄膜電晶體的結構，在實驗結果中顯示多重閘極搭配十條奈米線通道有較佳的元件特性：有更低的漏電流、更高的開關電流比、更低的臨界電壓、更為陡峭的次臨界斜率，並可抑制紐結效應(Kink effect)。將元件圖案相依金屬誘化側向結晶薄膜電晶體製程中多加一道氨電漿處理，以及改變單一閘極為多重閘極結構，皆可大幅提升元件特性以及降低薄膜電晶體之不理想效應。此元件圖案相依金屬誘化側向結晶薄膜電晶體的製程技術，可與現今的互補式金屬氧化物半導體（CMOS）製程技術相結合而不必再添加額外的光罩。此高效能之元件圖案相依金屬誘化側向結晶薄膜電晶體將可應用在主動式矩陣液晶顯示器以及三維立體之金氧半場效電晶體（MOSFET）積體電路元件上。

I have studied the effects of NH3 plasma passivation on the electrical characteristics of pattern-dependent metal-induced lateral crystallization (PDMILC) polysilicon thin-film transistors (poly-Si TFTs). These transistors have various numbers of multiple channels. PDMILC TFTs with NH3 plasma passivation outperform those without such passivation. This is because of the effective hydrogen passivation of the grain-boundary dangling bonds, and the pile-up of nitrogen at the SiO2/poly-Si interface. Additionally, the performance of such devices improves as the number of multi-channels increase. In particular, the electrical characteristics of a nano-scale TFT with ten 67 nm-wide split channels (M10) are superior to other TFTs. For example, the M10 TFT has a higher field effect mobility of 84.63 cm2/Vs, a higher ON/OFF current ratio (>106), a steeper subthreshold slope (SS) of 230 mV/decade, an absence of drain-induced barrier lowering (DIBL) and favorable output characteristics. We have found that the active channels of the M10 TFT have exhibit for the best NH3 plasma passivation, due to its split nanowire channels structure. We have also studied for the pattern-dependent nickel (Ni) metal-induced lateral crystallization (Ni-MILC) polysilicon thin-film transistors (poly-Si TFTs) with ten nanowire channels and multi-gate. Experiment results show that employing ten nanowire channels improves the Ni-MILC poly-Si TFT performance, including a higher ON/OFF ratio and a lower threshold voltage (Vth) than single-channel TFT. Furthermore, experimental results reveal that a combination the multi-gate structure and ten nanowire channels can further enhance the entire performance of Ni-MILC TFT, including a low leakage current, a high ON/OFF ratio, a low Vth, a steep subthreshold swing (SS), and a kink-free output characteristics. From our studies, we conclude that the performance of the PDMILC TFTs can be improved by NH3 plasma passivation. The lateral electrical field of a ten multiple nanowire channels TFT can be effectively reduced by additional multi-gate control. The PDMILC TFTs process is compatible with CMOS technology, and involves no extra mask. Such high performance PDMILC TFTs are thus promising for use in future high-performance poly-Si TFT applications, especially in AMLCD and 3D MOSFET stacked circuits.