標題: 使用0.13μm互補式金氧半製程設計之3.125Gb/s光通訊接收端可適性等化器架構
A 3.125-Gb/s Optical Receiver with Adaptive Equalizer in 0.13μm CMOS Technology
作者: 易秉威
Yi, Bin-Wei
蔡嘉明
Tsai, Chia-Ming
電子研究所
關鍵字: 光接收器;互補式金氧半製程檢光二極體;可適性等化器;Optical Receiver;CMOS Photodiode;Adaptive Equalizer
公開日期: 2008
摘要: 本論文設計單晶整合光接收器,在標準金氧半製程裡整合檢光二極體與接收器前端電路。接收器使用可適性等化器之架構來補償不同光波長之頻率響應,並使用源極退化級及負阻抗的技術,使其頻寬從5MHz提升到2.2GHz。本次提出雙迴圈的控制系統,內含一個將高頻資訊擷取成數位訊號的斜率偵測器,並使用一個利用直流準位來控制訊號振幅的仿製路徑,這兩電路使本次的架構具有高迴圈增益並同時減輕了兩個迴圈互相干擾造成的補償誤差。光接收器之設計目標在不同輸入光強度情況下都能達到600nm-850nm的光波長可適性。因應不同光波長造成的響應,使用可調式等化器與可變增益放大器來確保補償能適當執行。為了接收多模光纖所有的雷射光能量,本次採用的檢光二極體面積為70μm× 70μm。檢光二極體在3.125GHz的高頻衰減可利用不同的逆偏電壓作出最多14dB的改善。在850nm光波長下量測,設計之光接收器可因應不同的入射光強度作出適當的補償,在檢光二極體響應率為0.123A/W時,達到-5.2dBm的靈敏度,針對不同逆偏壓的檢光二極體,光接收器也能自動對高頻衰減作出不同程度的補償。設計的晶片面積為1mm×1mm,在1.5V供應電壓下消耗120mW的功率。
This thesis presents monolithically integrated optical receivers, consisting of integrated photodiodes and receiver front-end circuits in standard CMOS process. The optical receiver adopts adaptive equalizer architecture to compensate the response of different light wavelength. Source degeneration and negative impedance is adopted to improve the bandwidth from 5MHz to 2.2GHz. This design provides a dual loop control system. The receiver incorporates a slope detector to transform the high frequency content of signal to digital output and incorporate a dummy path to control signal swing by detecting the DC level. These two design blocks enhance the loop gain and reduce the compensation error caused by the interaction of two loops. This design is for adaptability of 600nm-850nm light wavelength in different light power. Therefore, the tunable equalizer and a variable gain amplifier in the receiver are used for appropriate compensation. In order to collect all the laser power from multi-mode fiber, the photo diode’s area is designed to be 70μm× 70μm. By using different reversed biased voltage on photo diode improves 14dB of the high frequency roll-off at 3.125GHz. Measurement result by using 850nm light wavelength achieves the adaptability of different light power and -5.2dBm sensitivity when responsivity of photo diode is 0.123A/W. Measurement result also achieves the adaptability for different roll-off of different reversed biased photo diode. The chip dissipates 120mW from a 1.5V supply voltage and its area is 1mm×1mm.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009511609
http://hdl.handle.net/11536/38137
顯示於類別:畢業論文


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