適用於數位助聽器之低複雜度多通道動態範圍壓縮技術

Abstract

數位助聽器由於有相當高的適應性和較為優異的音質表現，已經大幅勝過傳統的類比助聽器。為了能夠調整適合不同聽障損害的聽力損失，數位助聽器必須能根據聽障者不同的聽覺損失來調整，但不可避免的，複雜的語音訊號處理運算會大幅增加數位助聽器的功率消耗；然而，數位助聽器的電池續航力一直被使用者所詬病，因此實現高度程式化和降低數位助聽器的運算複雜度一直是亟需解決的議題。本論文探討數位助聽器中最關鍵的運算模組之一：動態範圍壓縮技術(dynamic range compression; DRC)。以三個通道（Channel/Band）的動態壓縮技術為例，傳統之動態壓縮模組，利用ARM926處理器來實現，約需1,100 MIPS的運算效能才能達到即時（Real-time）的需求。本論文就動態範圍壓縮技術，從其演算法、架構、以及數值表示上，全方面進行最佳化設計，在不影響音質的條件下，我們提出的演算法實現，可降低傳統助聽器動態壓縮模組約98%的運算量，此低運算複雜度的動態壓縮技術可實現於fixed-point或DSP的處理器上。另外，本論文亦提出一基於輔助聽力指標(aided audibility index; AAI)的動態範圍壓縮技術參數調配方法，可搭配醫師所開立的處方進行助聽器參數的細部調整。最後，上述所有的演算法已實作於一個搭配PC參數調整平台的ARM-based助聽器雛型系統中，並完整驗證其可行性。

Due to its high flexibility and rather good signal quality, digital hearing aids have made themselves outperform the traditional analog ones. In order to unique fit conditions of individual hearing-impaired people, digital hearing aids must have high level of programmability, which inevitably leads to an increase in power dissipation. However, the short battery lifetime is the most unsatisfactory factor for users. Consequently, improved methods of achieving high programmability as well as low power dissipation are highly desirable for digital hearing aids. This thesis addresses the complexity reduction of dynamic range compression, which is one of the most important modules in digital hearing aids. For the 3-channel DRC on ARM926 processor, the traditional DRC needs more than 1,100 MIPS computing power for real-time 32KHz audio signal processing. In this thesis, we propose a complexity-effective dynamic range compressor (DRC), whose computation is minimized through algorithmic, numerical, and architectural optimizations. The proposed complexity-effective dynamic range compressor saves about 98% computation complexity with the comparable sound quality. Besides, we also propose the complexity-aware parameters adjustment method for DRC based on the Aided Audibility Index (AAI), which can fine-tune the hearing aids parameters with the prescriptions. The feasibility of the proposed complexity-aware DRC has been verified through prototyping on an ARM-based platform, which equips a PC-based hearing aid emulator for parameter selection and evaluation.hearing aids. A complexity-effective dynamic range compressor (DRC) applied in fixed-point or DSP processor, whose computation is minimized through algorithmic, numerical, and architectural optimizations, is proposed. The proposed complexity-effective dynamic range compressor saves about 98% computation complexity with the comparable sound quality. Besides, we also propose the complexity-aware parameters adjustment method for DRC based on the Aided Audibility Index (AAI), which can fine-tune the hearing aids parameters with the prescriptions. The feasibility of the proposed design has been verified through prototyping the complexity-effective compressor on an ARM-based hearing aid prototyping platform, which equips a PC-based emulator for parameter selection and evaluation.