標題: | A 2.5-V 14-bit, 180-mW cascaded Sigma Delta ADC for ADSL2+ application |
作者: | Chang, Teng-Hung Dung, Lan-Rong Guo, Jwin-Yen Yang, Kai-Jiun 電控工程研究所 Institute of Electrical and Control Engineering |
關鍵字: | analog-to-digital conversion;asymmetric digital subscriber line (ADSL);multistage;resonator-based topology;sigma-delta Sigma Delta modulation |
公開日期: | 1-十一月-2007 |
摘要: | This paper presents a sigma-delta (Sigma Delta) analog-to-digital converter (ADC) for the extended bandwidth asymmetric digital subscriber line application. The core of the ADC is a cascaded 2-1-1 Sigma Delta modulator that employs a resonator-based topology in the first stage, three tri-level quantizers, and two different pairs of reference voltages. As shown in the experimental result, for a 2.2-MHz signal bandwidth, the ADC achieves a dynamic range of 86 dB and a peak signal-to-noise and distortion ratio of 78 dB with an oversampling ratio of 16. It is implemented in a 0.25 mu tm CMOS technology, in a 2.8 mm(2) active area including decimation filter and reference voltage buffers, and dissipates 180 mW from a 2.5-V power supply. |
URI: | http://dx.doi.org/10.1109/JSSC.2007.906186 http://hdl.handle.net/11536/3874 |
ISSN: | 0018-9200 |
DOI: | 10.1109/JSSC.2007.906186 |
期刊: | IEEE JOURNAL OF SOLID-STATE CIRCUITS |
Volume: | 42 |
Issue: | 11 |
起始頁: | 2357 |
結束頁: | 2368 |
顯示於類別: | 會議論文 |