全數位高解析度寬頻頻率合成器之設計

Abstract

摘要

全數位頻率合成器為現今電路設計中之一個重要部份，特別是應用在個人數位行動通訊之系統晶片。而數位振盪器的輸出直接影響到頻率合成器的效能好壞，本論文特別專注於數位振盪器之效能提升，在此使用了標準元件中的AOI/OAI之原生電容做為數位可變電容器，可將最小控制位元之頻率解析度提高至10fs，利用四級的微調單元及使用數位轉時間轉換器來加大頻率操作範圍並節省晶片面積，在反相延遲信號線加入反及閘做為致能開關，來降低不必要之功率消耗，並搭配低複雜度之頻率追蹤演算法，在一般條件下可在30週期數內鎖定頻率，達成大頻率操作範圍及高解析度之目的，並且為低功率消耗低晶片面積之設計，整個設計皆使用標準元件，因此可在更短的設計時間內轉換不同製程，在數位振盪器的關鍵元件配置部份，採用標準元件之手動的擺放和繞線，以確保設計符合要求，也節省了若使用全客製化設計之心力，經由HSpice的模擬，可得本設計有187KHz到345MHz 之操作範圍且最小控制位元可達10fs之解析度。

Abstract

The most important part of modern circuit design is the all-digital frequency synthesizer. That especially for the personal mobile communication application in SoC design. The output of digitally-controlled oscillator (DCO) will directly impact the performance of the frequency synthesizer. This thesis is focus on the performance enhancement of the DCO. The proposed DCO used AOI/OAI standard cells to form as digital controlled varactor. It could increase the LSB frequency resolution to 10fs. Four fine tune cell and digital to time converter are used to archive wide frequency operation range without big chip area. This work added enable cell such as NAND into the inverter delay line. It can prevent unnecessary power dissipation. To combine a low complexity frequency tracking algorithm that frequency locking time is within 30 clock cycles in typical case. Thus, this work is a wide operation range, high frequency resolution, low power and small chip size design. In this work all the cells are standard cell. It makes process switch more quickly. The place and route of the DCO key components are done by manual. This ensures that the design is under specification and is also saving the effort if done by fully-customer. Through HSpice simulation, this work can operate at 187KHz~345MHz, the LSB controlled frequency resolution is 10fs.