标题: | 中尺寸薄膜电晶体液晶显示器因COG封装所造成局部翘曲及应力对漏光现象之探讨 Effects of Localized Warpage and Stress on Chip-on-Glass Packaging Induced Light Leakage Phenomenon in mid-size TFT-LCD |
作者: | 张晋诚 吕志鹏 Leu, Jih-Perng 材料科学与工程学系 |
关键字: | 漏光;玻璃覆晶封装;翘曲;应力;有限元素分析法;Mura;chip-on-glass (COG);warpage;stress;finite-element-analysis (FEA) |
公开日期: | 2008 |
摘要: | 漏光Mura是指在液晶显示器(LCD)面板上亮度不均匀的瑕疵。此缺陷源自于Chip-on-Glass (COG) 封装,由于玻璃基板和矽晶片之间热膨胀系数的差异,当矽晶片藉由异方性导电薄膜(ACF)与玻璃基板黏合,将会使面板产生翘曲进而导致漏光Mura发生。如今为了满足显示器轻量化的需求而使用更薄的玻璃基板将使得漏光Mura缺陷更加严重。 本论文利用商用模拟软体ANSYSTM以有限元素分析法(FEA)建立一3D数值模型来计算LCD面板在经过COG封装之后所产生的翘曲及应力,并研究其与漏光现象的相关性,进而探讨COG封装所引起之Mura缺陷的成因。接着研究制程温度及ACF的材料性质还有矽晶片的尺寸大小及排列对Mura缺陷的影响。此外利用量测表面形貌仪器KOSAKA ET4000A,藉由实际的实验量测来验证模拟的可靠度。 根据实验及模拟计算的结果,发现了面板翘曲、应力分布和漏光现象之间具有高度的相关性。根据分析结果探讨可能造成漏光缺陷的根本原因,主要是由于液晶分子的指向矢及在配向膜表面的分子链排列方向会被COG封装所产生的应力所影响而造成。虽然LCD为了轻薄化而将玻璃基板厚度从0.5 mm降至0.3 mm时会产生漏光现象,但藉由将制程温度由180 oC降至160 oC及采用低杨氏模数的ACF可以将漏光缺陷有效改善或消除。最后本论文提出其它改善漏光现象的方法,例如使用薄化的矽晶片、缩减矽晶片的长度或填充材料(dummification)等方式,并且利用数值模拟来计算其改善漏光的效率。这些方法不仅具有低本成及高可行性的优势,从模拟计算结果显示也可以有效解决Mura漏光缺陷。 Light leakage Mura i.e. the non-uniform brightness in LCDs, occurred upon the completion of chip-on-glass (COG) packaging of silicon IC driver through the thermal bonding of anisotropic conducting film (ACF) resulting from the coefficient of thermal expansion (CTE) mismatch between glass substrate and silicon chips. In mid-size TFT-LCD demanding low weight and high mobility, such Mura defect deteriorated as thinner glass plates were introduced and implanted. In this study, the root-causes of Mura defect induced by COG package were examined and proposed. Then, the impact of thermal bonding temperature and thermo mechanical properties of ACF on Mura defect was investigated. In addition, the effects of dimension and layout of Si chips were also explored. In specific, a 3-D finite element analysis (FEA) model using ANSYSTM was first established to examine the warpage and stress behavior of the glass substrate in order to explore their correlation with light leakage phenomenon. In addition, the simulated warpage data were validated by surface contour measurement tool using surface profiler, KOSAKA ET4000A. Based on experimental data and numerical analysis, the strong relationship among light leakage defect, warpage and stress behavior was found. Besides, the root-cause of light leakage phenomenon was proposed. The Mura may resulted from the re-orientation of the director of the liquid crystal molecules and/or the orientation of the polymer chains on the alignment layer surface induced by the non-uniform stress resulting from COG packaging. Although the light leakage Mura appeared when the thickness of glass substrate was decreased from 0.5 mm to 0.3 mm, reducing ACF thermal bonding temperature from 180 to 160oC or reducing ACF modulus can effectively eliminate Mura defect. Numerical modeling was also utilized to analyze the effectiveness of the dimension and layout of Si chips on Mura improvement. A low cost and effective solution can be realized through thin silicon die, shorter die in length or the use of dummification. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079618504 http://hdl.handle.net/11536/42307 |
显示于类别: | Thesis |
文件中的档案:
If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.