DESIGN OF ALGORITHM-BASED FAULT-TOLERANT VLSI ARRAY PROCESSOR

标题:	DESIGN OF ALGORITHM-BASED FAULT-TOLERANT VLSI ARRAY PROCESSOR
作者:	LIU, CM JEN, CW 交大名义发表电控工程研究所 National Chiao Tung University Institute of Electrical and Control Engineering
公开日期:	1-十一月-1989
URI:	http://hdl.handle.net/11536/4273
ISSN:	0143-7062
期刊:	IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES
Volume:	136
Issue:	6
起始页:	539
结束页:	547
显示于类别：	Articles

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APA	LIU, C., & JEN, C. (1989). DESIGN OF ALGORITHM-BASED FAULT-TOLERANT VLSI ARRAY PROCESSOR. WOS:A1989CB44300012.
Bibtex	@article{LIU1989DESIGN, title={DESIGN OF ALGORITHM-BASED FAULT-TOLERANT VLSI ARRAY PROCESSOR}, author={LIU, CM and JEN, CW}, journal={WOS:A1989CB44300012}, year={1989}, url={https://ir.lib.nycu.edu.tw/handle/11536/4273?locale=zh_CN}, }