導線架多層式打線端點自動校正之光學檢測系統設計與開發

Abstract

焊線接合(Wire Bonding)--俗稱打線是IC封裝中的一道製程，目的是依照R&D部門所設計附有打線資訊的CAD圖，讓打線機台讀取打線資訊，利用打線技術以金線連接IC晶片上的I/O墊片(Pad)與導線架之引腳(Lead)，使得電子訊號得以傳輸；然而導線架製程在精密度上的不足，使得導線架與CAD圖之間存在些許偏異，常導致錯誤的打線結果。 針對多層式打線常發生的三種錯誤情形：1.金線端點沒有完整的打在CAD圖指定的引腳上，造成金線端點容易彈開而造成損壞。2.金線端點打在CAD圖指定的引腳上，但端點與墊片的距離較原先CAD圖指定的端點與墊片的距離來得遠或近，3.由人工校正偏離引腳中軸的打線端點可能產生的人為誤差，造成實際打線出現錯打線的情形。本研究設計與開發一套打線端點自動校正系統，以虛擬打線技術模擬實際打線端點在導線架上的位置，在尚未實際打線前，偵測出引腳中軸位置以作為端點校正之基準，並自動校正錯誤與偏離的打線端點，對於端點校正之效率與正確性有極高的幫助。

Wire bonding, a process of the IC packaging, enables the electronic signal be transmitted between the IC chip and the Leadframe. However, because of the insufficient precision of the Leadframe, deviations between the CAD diagram and the Leadframe are unavoidable that result in wrong bonding. Common errors of multi-layer wire bonding were: (1) The gold wire was not bonded on the lead completely. The end point of the wire was prone to flip from the lead; (2) The gold wire was bonded on the lead, but the wire length between the lead and the pad was either longer or shorter than the original one that was suggested by CAD diagram; (3)Wire was bonded onto the wrong lead caused by human error. In this thesis, an AOI system for auto-correcting the bonding positions of multi-layer wire IC was proposed. A virtual wire bonding technique was used to simulate the real bonding positions. The median axis of each lead must be determined before the real bonding process and then adopted for auto-correcting the wrong bonding positions. The proposed method was efficiency and robust for correcting the bonding positions.