氮化矽記憶元件內電荷分佈與可靠性分析

Abstract

本篇論文主要著重於氮化矽記憶元件內儲存電荷分怖以及讀取電流不穩定等可靠性議題之討論。這些可靠性議題主要包括：寫入狀態電荷之橫向分佈（program charge lateral spread）、寫入動作干擾（program disturb effect）、以及讀取電流雜訊（read current noise）。而在此研究中，氮化矽記憶元件為一n型通道金氧半場效電晶體包含一ONO閘極結構。 由於雙位元操作，逆向讀取第二位元之臨界電壓時，可能受到第一位元儲存電荷的干擾，故控制儲存電荷分佈為一重要可靠性議題，我們以電荷幫浦方法(charge pumping)得以一窺氮化矽層中儲存電荷之分佈情形。此外，建立一套微秒暫態量測電路（micro-second transient measurement circuit），藉著此電路的輔助，我們將得以觀測短時間因寫入動作干擾所引發的可靠性議題，並研究因隨機雜訊所引發之讀取電流不穩定，此一不穩定現象會隨著寫入/抹除次數增加和閘極長度微縮而變差。且利用通道熱電子所寫入之不均勻電荷分佈亦會擴大其效應。憑藉在本篇論文中所提及之氧化層改進方法，此種負面現象將得以舒緩。

This thesis will focus on the discussion of localized trapped charge distribution in nitride film and read current instability issue in a SONOS type flash memory cell, which include program charge lateral spread, program disturb effect, and read current noise. In this study, the flash memory cell is made of a n-channel MOSFET with an oxide-nitride-oxide gate structure. For two-bit storage, the control of programmed charge lateral distribution is particularly important since stored electrons at the first bit will affect the threshold voltage of the second bit in reverse read. We use a charge pumping method to explore the programmed charge distribution of each bit. In addition, a micro-second transient measurement circuit is set up to investigate the program disturb effect. Furthermore, program/erase cycling induced random telegraph noise in read current noise is observed. The amplitude of current fluctuation increases with P/E cycle number and with decreasing gate length. Non-uniform charge storage by CHE programming can further enhance read current fluctuation. The improvement of bottom oxide reliability can significantly reduce this effect.