應用於IEEE 802.11a/b/g無線區域網路中雙頻帶射頻接收器模組電路之設計與實現

Abstract

在這篇論文中設計並製作了兩大類的雙頻帶射頻接收器，第一類包含“切換模式”和“並行模式”，而第二類則是由“共存模式”和“寬頻模式”所組成。設計部分完成了2.4GHz和5GHz頻帶的“切換模式”和“並行模式”前端接受器以及2.4/5GHz雙頻帶“共存模式”前端接受器和“寬頻模式”低雜訊放大器。而實作電路則包含一個5.25GHz頻帶的射頻前端接受器以及一個”共存式”雙頻帶低雜訊放大器，並採用聯電0.18μm 1P6M mixed-mode/RF CMOS製程，智森高頻元件模組和矽品QFN系列封裝。量測結果顯示當前端接收器消耗30mA電流的同時，可以提供18dB的電壓增益(Av)，1dB增益壓縮點(P1dB)為-27dBm，三階交調點(IIP3)和二階交調點(IIP2)分別為-3dBm以及-12dBm，而雜訊指數(NF)則為6.4dB。低雜訊放大器有27mW功率消耗，可同時在2.4GH提供6.7dB的功率增益(S21)，在5.25GHz則為-7.2dB，但由於輸入阻抗匹配的偏移，最大增益點則發生在2.74GHz，有11.9dB以及在5.25GHz為-5.1dB。

In this thesis, two groups of dual band receiver are designed and fabricated. The first group consists of “switched mode” and “parallel mode”. The other group is composed of “concurrent mode” and “wideband mode”. The circuit design comprises 2.4 GHz and 5 GHz dual band receiver frontend for “switched mode” and “parallel mode”, and 2.4/5 GHz dual band receiver frontend for “concurrent mode” as well as “wideband mode” LNA. The chip implementations include a 5.25 GHz receiver frontend and a concurrent dual band LNA employing UMC 0.18μm 1P6M mixed-mode/RF CMOS process, RF device models, and QFN series package provided by Giga-solution and SPIL respectively. The experimental results show that the receiver drains 30 mA of current and achieves the voltage gain of 18 dB, P1dB of -27 dBm, IIP3 of -12 dBm, IIP2 of -3 dBm, and NF of 6.4 dB. The LNA has a power gain of 6.7 dB at 2.4 GHz band, -7.2 dB at 5 GHz band having power dissipation of 18 mW, while the maximum power gain of this LNA is 11.9 dB at 2.74 GHz, -5.1 dB at 5.25 GHz due to the shift of input matching.