完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 陳浤偉 | en_US |
dc.contributor.author | Chen, Hong-Wei | en_US |
dc.contributor.author | 鍾崇斌 | en_US |
dc.contributor.author | Chung, Chung-Ping | en_US |
dc.date.accessioned | 2014-12-12T01:34:20Z | - |
dc.date.available | 2014-12-12T01:34:20Z | - |
dc.date.issued | 2008 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT079655627 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/43435 | - |
dc.description.abstract | 本論文提出一個區塊式深度值測試方法來有效的減少在細線化之前的資料量。在繪圖管線中,不管是否存在其他深度值測試方法,區塊式深度值測試都可以和既有的繪圖管線完美的結合,而且區塊式深度值測試的效果比起以物件為單位的深度值測試好許多。在本論文中,會在細線化前將物件切分成許多適當大小的區塊且透過區塊式深度值的測試來過濾掉大部分被擋住的區塊,以此來減少繪圖管線後續的工作量和儲存空間。有主要兩個優點:一來是可以透過單次的深度值測試過濾掉許多網格(一個區塊內的所有網格);二來是可以減少細線化不必要的運算量。而為了實現本論文,需要額外的一塊區塊深度值儲存器和切分區塊及區塊深度測試的電路。 雖然本論文會加深整個繪圖管線的深度,但不會影響整體繪圖管線的總處理量,甚至可能提高。其原因是對網格作運算是整體繪圖管線的瓶頸處,而本論文可以有效得減輕這些瓶頸處。 | zh_TW |
dc.description.abstract | We propose a blocked-Z test to effectively eliminate unnecessary data traffic between triangle setup and rasterization. This method works seamlessly with the existing rendering pipeline, with or without those existing fragment-based hierarchical Z/early Z/Z tests. And it performs much better than primitive-based Z test, in terms of data structuring and coverage. In this method, primitives are blocked into proper sizes and blocked-Z tested to filter out the most of hidden blocks, easing the storage and workloads of subsequent rendering tasks. Advantage of this method comes from two features: the blocked test, in which only one test may be sufficient to filter out a group (of the block size) of fragments; and the place of the test saving even unnecessary rasterization. Block sizes are determined statically without hardware nor runtime overhead, and an additional blocked-Z buffer, of the size of [Z buffer/(# fragments in block)], plus blocking and Z-test circuitry, are required. This design lengthens the rendering pipeline, but will not affect the throughput; in fact, it may even increase throughput, since a common wisdom is that the fragment-based pipeline stages are graphics rendering bottlenecks, and our proposal effectively relieves these bottlenecks. Experimental results using Doom3 and Quake4 with various screen sizes show that the rasterization and Z test workloads can be saved by 70%. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 繪圖處理器 | zh_TW |
dc.subject | 深度測試 | zh_TW |
dc.subject | 提早之深度測試 | zh_TW |
dc.subject | Graphic Processing Uint | en_US |
dc.subject | Z test | en_US |
dc.subject | Early-Z test | en_US |
dc.title | 細線化前之區塊深度值測試與其對系統設計之影響 | zh_TW |
dc.title | Pre-rasterization blocked-Z test and its impact on system design | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 資訊科學與工程研究所 | zh_TW |
顯示於類別: | 畢業論文 |