標題: | 整合於可攜式腦心監護系統之DOT/ECG/EEG多處理器設計 Integrated DOT/ECG/EEG Multiprocessor Design for Portable Brain-Heart Monitoring Systems |
作者: | 李鴻溝 Ericson Go Chua 方偉騏 Fang, Wai-Chi 電機資訊國際學位學程 |
關鍵字: | 獨立成分分析;心率變異率分析;擴散式光學影像重建;整合型生醫系統;藍牙傳輸;無失真資料壓縮;可攜式系統;數位訊號處理;系統晶片;Independent Component Analysis;Heart Rate Variability;Diffuse Optical Tomography;Integrated Healthcare System;Bluetooth Wireless Communication;Lossless Data Compression;Portable Healthcare;Digital Signal Processing;System-on-Chip |
公開日期: | 2011 |
摘要: | 近十年隨著老年人口快速膨脹,醫療費用的增加儼然成為全球關注的共同議題。人手的短缺使得醫療照顧體系無法應接數量激增的老年病人,昂貴的診金和治療費更讓許多人無法享用到優質的醫療服務。因此近年來,生物醫學工程已成為至關重要的研究和發展主題。
為了應對在特定緊急護理、長期的觀察、認知科學在醫療監控應用的需求,我們提出發展一個綜合的腦心臟監測系統芯片,並提供一個示範平台,以證明此領域之研究是可行的,也為了今後相關的工作和發展。這項工作的動機有三:第一是以便攜式的生物醫學工具使病人在治療期間更舒適,行動更方便;二是降低整體系統成本,當中包括在家庭和醫院裡相關的設備、操作過程、物流和管理;三,為腦心監測應用的新研究方向鋪路。
本論文旨在發展一種能夠整合多種生物醫學訊號的系統處理器,包括擴散光學腦部影像重建(DOT)處理器、可除去腦電訊號(EEG)雜訊的獨立成分分析(ICA)器、用來分析心電訊號(ECG)的心率變異性處理器(HRV)。同時,為了降低功率消耗與延長工作時間,此種多功能處理器內含一種無失真資料的壓縮處理器,可用來降低從可攜式裝置(portable device) 傳送生物醫學訊號到生醫資訊工作站(science station)時的帶寬要求。此多重處理器設計使用聯華電子65奈米CMOS製程下線晶片,此外,也實現於AHB相容IP之Xilinx FPGA做系統單晶片設計。
為了展示此多重處理器設計的功能性和即時處理的廣泛應用,此篇論文提出一個完整的、端至端且實現於SoC FPGA開發平台的腦心監測系統。由前端訊號擷取模組所得到的生醫訊號被傳送至相應的即時運算引擎進行分析處理後,處理完的結果再與原始訊號由一個無損失性生醫信號壓縮模組進行資料壓縮,最後再經由一個商業藍牙模組傳至臨近的生醫資訊工作站進行3D顯像及遠端觀察與診斷。 In the recent decade, the accelerated emergence of an aged population alongside increased medical costs has been recognized as a worldwide problem. Whereas a shortage in medical personnel will leave the healthcare system unable to meet the requirements of a growing number of elderly patients, even more will be deprived of access to quality healthcare due to the high costs of diagnosis and treatment. As a result, in recent years, the field of biomedical engineering has emerged as a top priority research and development topic. In response to the needs of healthcare monitoring applications in particular emergency care, long-term observation and cognitive science, we propose the development of an integrated brain-heart monitoring system and provide a demonstration platform as a proof of concept for future works and development along this topic. The motivation of this work is threefold; first is to improve patient experience by means of a portable biomedical device; second, to reduce overall system costs associated with the equipment, operations, logistics and management in both hospital and home care settings; and third, to pave the way for new research directions relating to brain-heart monitoring applications. In this thesis, we present the development of a biomedical signal multiprocessor comprising a novel diffuse optical tomography (DOT) processor for brain imaging, an independent component analysis (ICA) processor for removing electroencephalogram (EEG) signal artifacts, and a heart rate variability (HRV) analysis processor for monitoring electrocardiogram (ECG) signals. Furthermore, in order to reduce power consumption and prolong operating time, a lossless data compressor is employed to reduce bandwidth requirements during wireless transmission of biomedical data. The multiprocessor design is implemented both as an AHB-compatible IP for ARM-based SOCs on a Xilinx FPGA and as an IC fabricated using UMC 65nm CMOS technology. To demonstrate the functionality and real-time application of the developed multiprocessor design, a complete, end-to-end brain-heart monitoring system platform employing the SoC-based implementation is presented. EEG, ECG and/or functional near infrared (fNIR) signals acquired by an analog front-end IC are processed or bypassed by the biomedical multiprocessor depending on configuration commands sent wirelessly from a remote science station. Processed or raw biomedical data optionally compressed by a lossless data compressor are packaged according to a fixed output data format and finally sent back to the remote science station for real-time LCD display, data storage, or further off-line processing and analysis. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079703502 http://hdl.handle.net/11536/44196 |
顯示於類別: | 畢業論文 |