整合於可攜式腦心監護系統之高能源效率4通道獨立成份分析處理器

Abstract

近年來快速增加的老年人口比例已然成為各國必需面臨的重要問題，整合型健康照護系統已經成為電子領域發展的重點。本論文由三個應用情境包括緊急醫療需求(如救護車上之緊急量測)、長期觀測與照護(老年退化性疾病)與腦認知科學的研究為出發點，提出一針對腦電訊號(EEG)、心電訊號(EKG)處理分析與擴散光學腦部影像重建(DOT)所構成之整合型系統之雛型設計，進以推動針對此三類系統的可攜性整合型醫療儀器之發展。 由於生理電信號中最微弱的腦電信號通常與肌電信號(EMG)中的眼動信號與眨眼信號一起混合並量測，以獨立成份分析為方法的人工雜訊濾除技術已發展許久。但由於獨立成份分析的運算複雜度過高，腦波的應用通常受到離線運算的嚴重限制。本論文針對所提出整合型系統中的腦電信號處理所使用的四通道即時獨立成份分析器之設計與實作以一完整章節加以詳述。由於可攜式儀器的基本需求即為低功率與低成本，多種設計技巧與最佳化規格分析如三重循環記憶體的配置、鏡像非線性查表單元的設計與ICA訓練、成份萃取間的管線排程皆被用來降低功率消耗與硬體成本。此ICA硬體設計已由聯電90奈米製程下線並測試。晶片的核心面積為0.58平方毫米。量測數據顯示若使用80 Hz的取樣頻率，並使用0.5 MHz的工作頻率與0.6 V的核心電壓時，可達到最低0.312毫瓦的功率消耗。 此獨立成份分析模組也與一心率變異率分析器、一擴散光學影像重建模組一同整合於一實驗性腦心監護系統之中。由前端訊號擷取模組所得到的生醫訊號被傳送至相應的即時運算引擎進行分析處理，處理完的結果與原始訊號皆由一無損失性生醫信號壓縮模組進行資料壓縮，再以一商業藍牙模組傳至臨近的生醫資訊工作站進行3D顯像與遠端觀察與診斷。此生醫訊號壓縮模組的平均壓縮率可達2.5，此壓縮率可被視為在無線傳輸上面的功率節省。系統中的資料流順序主要由一固定優先權資料選擇器與一三級向後資料流控制機制所影響，而這樣的設計也能提高各模組的輸出緩衝記憶體使用率，如此一來可以造成較少的傳輸緩衝記憶體使用。獨立成份分析與心率變異率分析引擎皆以真實生理訊號驗證，並顯示優良的分析結果。而腦影像重建引擎則以一模型來顯示其分析與真實情況的一致性。

Since the twenty-first century, the fast increment of an aged population has become a worldwide problem. Therefore, integrated health-care systems have become an important topic for electrical engineers. In this thesis, focusing on three application scenarios including emergency medical care (e.g. EEG, EKG measurements on ambulance or DOT for fast cerebral hemorrhage check), long-term observation and monitoring (for patients suffer from chronic ailment) and researches on brain and cognitive science, we propose a preliminary design of an integrated health-care system comprising electroencephalogram (EEG) and electrocardiogram (EKG) signal analysis and processing together with diffuse optical tomography for brain imaging. The significance of this system is to enable the practical development of such portable health-care devices for brain heart monitoring. Since the EEG is the feeblest one of all physiological electrical signals usually contaminated by ocular artifacts (e.g. eye-blink artifact and eye-movement artifact), the artifact removal techniques using independent component analysis (ICA) has been developed for a long time. Because of the compelling computation complexity of ICA algorithm directly inherits from the possible dependency in each channel, applications that analyze EEG signals are usually heavily restricted by the off-line ICA computation. One complete chapter is used to describe the design and implementation of the 4-channel ICA processor employed in the proposed integrated system as the EEG processing element. Since the two basic requirements for portable instruments are low-power and low-cost, various design techniques and optimized specification analyses like three-bank circular memory allocation, an mirrored non-linear lookup unit and the operation pipelining between the ICA training and component extraction are all adopted to reduce the power consumption and hardware cost. The designed ICA processor is fabricated using UMC 90 nm CMOS technology, and the core area of the chip is 0.58 mm2. Performance measurements done by Agilent 93000 SoC Tester have shown that when using 80 Hz sample rate, 0.5 MHz operation frequency and 0.6 V core power, the lowest power consumption of 0.312 mW is achieved under the worst cast of 512 training iterations. Together with an HRV and fNIR-DOT processor, the designed ICA processor is integrated in an experimental brain heart monitoring system. EEG, EKG and near-infrared signals acquired from the analog front-end IC are processed in real-time or bypassed according to user configurations. Processed data and raw data are compressed by a lossless biomedical data compressor and sent to a remote science station by a commercial Bluetooth module for further analysis, 3-D visualization and remote diagnosis. The biomedical signal compressor achieves an average compression ratio (CR) of 2.5 which is translated into power saving during wireless transmission. The data flow in the system is mainly controlled by a prioritized data selector and a three-stage backward handshaking mechanism, and the design can increase the utilization of the output buffers inside each processor so that the data transmission buffer can be reduced. The ICA and HRV processor are verified by real EEG and EKG signals while the DOT processor is verified by an experimental model.