SONOS快閃記憶體中寫入電荷和元件結構對於隨機電報雜訊的影響

Abstract

在本篇論文中，我們研究了氮化矽快閃式記憶體(SONOS Flash Memory)中的寫入載子對隨機電報雜訊(Random Telegraph Noise)之振幅的影響。同時，我們對浮動閘極快閃式記憶體(Floating Gate Flash Memory)、平面式氮化矽記憶體及鰭狀(FinFET)氮化矽快閃式記憶體做了測量與模擬的工作。我們發現平面式氮化矽記憶元件在資料寫入後隨機電報雜訊振幅分布得寬廣，而浮動閘極記憶元件在資料寫入前後有相同的隨機電報雜訊振幅。在平面式氮化矽記憶體的情況下之所以分布得寬廣歸因於隨機且分離的寫入載子造成的電流路徑滲透作用。因此在建立氮化矽快閃式記憶體中隨機電報雜訊的模型時，必須將寫入載子效應納入考慮。

在氮化矽記憶體中隨機電報雜訊的寫入載子效應可由類似包覆式閘極的結構顯著減少，例如鰭狀的結構，利用較高的寫入載子分布對稱性來降低寫入載子效應。

Nitride program charge effect on the amplitude of random telegraph noise (RTN) in SONOS flash cells is investigated. We measure and simulate RTN amplitudes in floating gate flash, planar SONOS, and FinFET SONOS cells. We find that a planar SONOS has a wide spread in RTN amplitudes after programming while a floating gate flash cell has identical RTN amplitudes in erase and program states. The spread of program-state RTN in a planar SONOS is attributed to a current-path percolation effect caused by random discrete nitride charges. Consequently, program charge effect has to be taken into consideration while establishing RTN model in SONOS. The RTN amplitude spread can be significantly reduced in a surrounding gate structure, such as FinFET SONOS, due to a higher degree of symmetry in a program charge distribution.