應用於下視網膜植入之高效率電流刺激式互補式金氧半晶片

Abstract

本篇論文中描述三種應用於下視網膜療程中的人工矽視網膜晶片設計與驗證，以提升感光電流刺激效率。包含單顆光電池陣列刺激晶片，兩顆串聯光電池陣列刺激晶片，與四區塊分區供電刺激晶片。 我們已設計並實作單一光電池陣列刺激晶片的體外生物實驗，成功的驗證視網膜晶片刺激視網膜細胞的生物反應，並得到使用75μm x 75μm的刺激電極，僅需不到0.28nC的電荷就可使視神經細胞產生反應。我們所設計的感光陣列中的單一像素均具有臨近的環繞式回流電極，由模擬中已驗證此種回流電極的設計方法可給予視網膜1.08μA的刺激電流，比擺放在遠端的環繞式回流電極的刺激電流高出三倍，且比擺放在遠端的單一回流電極的刺激電流高出十倍。將兩顆光電池串聯可得到較高的電位，基於我們由不同大小的微電極晶片已量測到視網膜與電極界面的阻抗在低操作頻率時超過一百萬歐姆，因此礙於小電位差單顆光電池陣列較難輸出電流。兩顆串聯光電池陣列的電路設計以提高電位的方式，在感光面積比單顆光電池陣列較小的情況下，可給予視網膜2.09μA的刺激電流，兩顆串聯的比單顆的光電池陣列高出近兩倍的電流刺激效能，用以改善視網膜阻抗過高的問題。在使用臨近的環繞式回流電極下，由模擬結果可得到單顆與兩顆串聯的光電池陣列最佳的感光面積分別為14400μm2與19200μm2，在此感光面積下，兩顆串聯光電池陣列的刺激電流比單顆的大1.65倍。 在四區塊分區供電的晶片設計中，已證明電路系統與光電池同時整合在互補式金氧半積體電路晶片上的可能性，並驗證各個區塊輪流使用光電池供電系統以提升電源管理效率的可行性。在原本1066顆光電池外，加入2540顆光電池，即可產生四個沒有重疊且不同相位的控制訊號。晶片的產生時脈電路在15.8mW/cm2的光照強度下，可產生1.5kHz的震盪，且其電路消耗功率僅為24.8nW。四區塊分區供電的電路可以產生在相同光照強度下可以得到約略1.1μA的電流輸出，比將5003顆光電池分成十六像素高約三倍的有效輸出電流，以提供視網膜細胞所需要的電性刺激，並節省四倍的電源。所提出電源管理架構大大改善了下視網膜療程中，金氧半晶片的電能使用效益與電流刺激效能。 在台灣積體電路製造股份有限公司與國家晶片系統中心的幫助下，不同大小的微電極晶片與單顆光電池陣列刺激晶片以0.35μm製程實現，兩顆串聯光電池刺激晶片與四區塊分區供電的刺激晶片以0.18μm製程實現。基於上述特性，此視網膜阻抗的分析結果，與三種視網膜電流刺激晶片的架構，均對下視網膜療程中的晶片設計上有相當程度的貢獻。

In this thesis, new retinal stimulation chips have been designed, analyzed, and fabricated to improve current stimulation efficiency of the subretinal prosthesis. Three types of stimulation chip are proposed, one is single solar cell array stimulation chip; another is two cascode solar cell array stimulation chip and still another is four-block divisional power-supply stimulation chip. The single solar cell array stimulation chip with local surrounding return electrode has been designed and verified after the in vitro experiment. The silicon retina with solar cell array can successfully trigger the ganglion cells with threshold charge lower than 2.8nC with 75μm x 75μm stimulating electrode. Probed retinal stimulation current of solar cell array with local surrounding return electrode is 1.08μA, which is 10 times of remote surrounding return and 3 times of remote single return. Probed retinal stimulation current of two cascode solar cell array is 2.09μA, which is 2 times more current efficient than single solar cell array. Retina interface impedance has been measured by the multi-size microelectrode chip. Retina interface impedance decreases with increasing frequency, increasing electrode size and decreasing center-to-center distance of electrodes. At low frequency, retina interface impedance is over 1MΩ which is difficult for stimulation current generated from solar cell array to flow into retina. High potential of two cascode structure is one of the solutions to this problem. With local surrounding return electrode, optimum photo-sensing regions of each pixel of single and two cascode solar cell array stimulation chips are 14400μm2 and 19200μm2 and current stimulation efficiency with the optimum photo-sensing region of the latter is 1.65 times larger than the former. In the work of four-block divisional power-supply stimulation chip, the capability of on-chip solar cell supply system integrated with circuit system in CMOS technology has been proved, and the feasibility of using power supply system in turn to elevate power management efficiency has also been verified. Power control unit with original 1066 solar cells and extra 2540 solar cells is able to generate four power control signals, which are nonoverlapping and on different phases, to control each block of pixel array. Clock frequency is 1.5kHz under 15.8mW/cm2 incident light intensity with only 24.8nW power consumption. The output stimulating current of each pixel is approximately 1.1μA under same light intensity. Comparing with 16-pixel conventional solar cell array, which can only generate 0.31μ A at 15.8mW/cm2 for total 5003 solar cells, output stimulation current of four-block divisional power supply stimulation chip is 3 times higher and power efficiency is 4 times higher. The proposed power management structure could be considered as one of the highly integrated solutions for the efficient current stimulation CMOS chips of subretinal prosthesis. Multi-size microelectrode chip and single solar cell array stimulation chip are fabricated with standard 0.35μm and tsmc process; two cascode solar cell array stimulation chip and four-block divisional power-supply stimulation chip are fabricated with standard 0.18μm tsmc CMOS process. The proposed efficient current stimulation chips all have contribution to the subretinal prosthesis.