标题: 利用尖角效应提高写入电场于薄膜电晶体之记忆体元件应用
The Electrical Field Enhancement of Corner Effects on Thin-Film Transistor Nonvolatile Memories
作者: 林岷臻
Lin, Mic-Chen
赵天生
Chao, Tien-Sheng
电子物理系所
关键字: 薄膜式电晶体;尖角效应;记忆体;特殊结构;Thin film transistor;Corner effect;Memory;special structure
公开日期: 2010
摘要: 我们提出一种新颖的结构来提高薄膜电晶体之非挥发性记忆体SONOS型记忆体的写入与抹除特性。而这个方法不仅仅非常简单也可运用于日后的三维结构制程技术中,且仍然能维持良好的可靠度;在此篇论文当中,我们成功的利用传统元件的LOCOS的概念与方法,使在通道的宽度方向上尖角数量的增加,并对尖角数量的增加去做了更进一步的电性探讨与可靠度的量测。在写入与抹除操作的选择上,我们分别选择FN穿隧注入(FN tunneling) 与基板暂态热电洞注入(Substrate transient hot-hole injection) ,利用局部电场在尖角二端的集中可提升其记忆体电子注入的速度与电洞的抹除。此结构的另外一个优点是其尖角为较圆滑的转角,故可以改善由载子的不均匀注入而产生的双峰(Double Hump)。
不同的氧化厚度会使通道宽度方向的尖角有不同的平台宽度与高低差,而其氧化厚度分别为100 nm、150 nm;我们发现并不是氧化厚度越厚所造成的尖角高低落差越大,对于记忆体特性的提升就越大,而是由有效通道宽度的长度去决定,较长的通道宽度会抑制对写入/抹除速度的提升。
此结构拥有相当多的优点,包含了较快速的写入速度、在高温下仍有良好的可靠度特性以及对通道宽度有相当高的相依性。所以此技术有相当大的潜力于未来的记忆体市场。
For the first time, we propose a special structure to enhance the characteristic of TFT-SONOS memory devices. The memory process is not only simple but also compatible with 3D circuit integration. In this thesis, we investigate the effect of corners along channel width direction on TFT-SONOS memory. The experiments in this study used a local-oxidation of silicon (LOCOS) scheme to fabricate an M-shape in the width direction of TFT-SONOS memory. The programming and erasing operations are performed by the FN tunneling (FN) and Substrate transient hot-hole (STHH) injection, respectively. The improvement of M-shape TFT-SONOS memory is due to the locally electrical field enhancement at corners. On the other hand, the other advantage of this corner structure is the rounded corners improve the “Double Hump” situation. “Double Hump” would be caused by non-uniform charges injection.
Different oxidation thickness would make the platform and structure off-set of corners are different. The oxidation thicknesses are 100 nm and 150 nm, respectively. The more oxidation makes the higher structure off-set, but it is not direct related devices performance. We found out not the longer of effective width would depress the improvement of program/ erase speed.
The design exhibits superior electrical performance, including faster program/ erase speed, excellent data retention at high temperature, and width dependence. Thus, it has the larger application potential for flash memory market in the future.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079721522
http://hdl.handle.net/11536/45009
显示于类别:Thesis


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