單相半橋升壓型功率因數修正器之EMI濾波器和緩震電路設計

Abstract

本研究從事單相半橋升壓型功率因數修正器之電磁干擾(Electromagnetic Interference, EMI)濾波器及Undeland緩震電路之設計以降低傳導性EMI問題。Undeland緩震電路具有導通和截止緩震電路功能，價格便宜，功率元件有較大安全操作區域(SOA)。實驗結果dv/dt由34.66V/μs降低至18.175V/μs及di/dt由6A/ns降低至0.5A/ns，驗證可以降低高頻EMI。傳統 EMI濾波器的設計，大多是採用嘗試錯誤法，不僅費力耗時，也不易掌握設計的品質。EMI濾波器的設計主要包含設計與實現兩個層次。在設計部分包括差模與共模濾波器的設計，在實現部分必須注意一些元件特性與製作的工程細節，例如差模電感的高頻濾波效果會因為線圈寄生電容而降低，選擇高頻功率損耗較大的鐵心可以改善此一情況。EMI濾波器要達到最大插入損耗的設計必須考慮雜訊源阻抗效應的影響，因此必須將雜訊源阻抗一起納入設計考慮。此外，差模濾波器的高頻響應會受到迴路雜散電感的互相耦合效應而降低性能，為了降低其耦合效應，兩側線圈必須保持適當距離；差模電容迴路的跑線也必須儘量降低其迴路面積，以降低耦合雜訊。本文針對高頻單相半橋式升壓型功因轉換電路的電磁干擾問題，提出了整合緩震電路與EMI濾波器的系統化分析與設計方法。

The present thesis designed EMI filters and Undeland snubber circuits for a single-phase half-bridge boost-type power factor corrector to reduce conducting EMI problems. Undeland snubber circuits can turn on/off snubber circuits with cheap price, and the power components have larger safe operating area (SOA). Our experimental results shown that dv/dt reduced from 34.66 V/µs to 18.175 V/µs, and di/dt reduced from 6A/ns to 0.5A/ns, which testify high frequency EMI reduction. Traditionally the EMI filters design is done by trial-and-error methods, which are not only strenuous and time consuming but also difficult for quality control. The designs of EMI filters include two stages, i.e., designing stage and realizing stage. The former stage includes the design of difference mode and common mode filters, while in the later stage attention need to be paid to some components characteristics and project details, for example, the high frequency effects of the difference inductance module filter will be reduced because of parasitic capacity of the coil, which can be improved by choosing while losing the larger one. Influence that EMI filter must consider the noise source impedance effect while reaching the greatest design that insert loss, answer this must mix noise source impedance is it is it consider to design to include in together. In addition, difference mode filter of high frequency response because of loop inductance mutual coupling effect to reduce performance, in order reduce mutual coupling effect, two side a coil must keep appropriate distance; difference mode capacitance loop trace also must as much as reduce loop areas to reduce coupling noise, addeess to integrated snubber and EMI filter to systematize analyze and design method.