標題: | 以ARM為基礎之鎖相迴路軟體化平台 ARM-based Software-defined Phase-locked Loop Platform |
作者: | 蘇楷書 Su, Kai-Shu 許騰尹 Hsu, Terng-Yin 資訊科學與工程研究所 |
關鍵字: | 鎖相迴路;phase-locked loop |
公開日期: | 2010 |
摘要: | 本論文提出了以軟體控制之鎖相迴路平台。此平台透過Advanced Microcontroller Bus Architecture (AMBA) 整合AndesCore CPU及誤差偵測器 (Error Detector)、數位控制振盪器 (Digital Controlled Oscillator, DCO)等矽智產 (IP)。使用C/C++等高階語言實作「鎖相迴路演算法」,利用CPU的運算能力執行此演算法控制其他IP。所有的IP皆以標準元件數位電路方式實作,並透過修改演算法之方式來更動平台之規格,以降低設計成本。 This thesis is proposed to the ARM-based platform of software-defined phase-locked loop. This platform is combined of AndesCore CPU and silicon intellectual property (IP) such as Error Detector and Digital Controlled Oscillator (DCO), all IPs and CPU are integrated with Advanced Microcontroller Bus Architecture (AMBA). The proposed「phase-locked loop algorithm」is implemented by high level language such as C/C++ and executed by CPU to control the IPs, all IPs are implemented by standard-cell-based design. The specification of the platform can be changed by modifying the algorithm to reduce design cost. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT079755632 http://hdl.handle.net/11536/45976 |
顯示於類別: | 畢業論文 |