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dc.contributor.author徐浩文en_US
dc.contributor.authorHsu, Hao-Wenen_US
dc.contributor.author趙家佐en_US
dc.contributor.authorChao, Chia-Tsoen_US
dc.date.accessioned2014-12-12T01:55:22Z-
dc.date.available2014-12-12T01:55:22Z-
dc.date.issued2012en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT079911620en_US
dc.identifier.urihttp://hdl.handle.net/11536/49155-
dc.description.abstract本篇論文提及關於測試延續正反器的幾項爭議,並且提供相對應的解決方法。嶄新的延續正反器測試程序被提出用來檢測延續正反器因製成所致的缺陷。此外,本篇論文提出特殊的測試向量自動產生器用於產生出基於盡量引發連線上的訊號轉換的測試向量。最後,整體實驗是運行在ISCAS 的標桿電路上,並且證實此測試向量自動產生器的優點以及能有效地測試延續正反器。zh_TW
dc.description.abstractThis thesis presents several issues about testing for retention flip-flops and proposes the corresponding solutions to those issues. A novel test procedure is proposed for detect many defects of retention flip-flops. Furthermore, a specialized ATPG framework is proposed to generate the test vectors for creating as many effective transitions on interconnects in the circuit as possible. The experimental results based on large ISCAS benchmark circuits demonstrate the efficiency of testing retention flip-flops and the advantages of using our proposed ATPG framework.en_US
dc.language.isoen_USen_US
dc.subject延續正反器zh_TW
dc.subject測試zh_TW
dc.subject虛擬電源供應zh_TW
dc.subject測試向量自動產生器zh_TW
dc.subjectRetention flip-flopen_US
dc.subjectTestingen_US
dc.subjectVirtual-VDDen_US
dc.subjectATPGen_US
dc.title延續正反器之測試策略zh_TW
dc.titleTesting Strategies for Retention Flip-flopsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
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