標題: 適用AlGaN/GaN HEMT功率電晶體的兩種驅動電路設計
Two Gate Driver Designs for AlGaN/GaN HEMT Power Transistors
作者: 黃士維
Huang, Shih-wei
陳宗麟
Chen, Tsung-Lin
機械工程學系
關鍵字: 閘極驅動電路;氮化鎵電晶體;電位位準轉換;空乏型電晶體;gate driver circuits;AlGaN/GaN Transistors;level shifters;D-mode Transistors
公開日期: 2012
摘要: 本論文針對操作於高電壓下的氮化鎵功率電晶體提出兩種驅動電路設計。一個完整開關電路包含上橋開關電路及下橋開關電路,為了提升開關電路的性能,上橋的功率電晶體採用 N型電晶體,此作法使得上橋的功率電晶體的源極成為浮動電壓,進而使得上橋驅動電路更為複雜。另外,一般功率電晶體為增強型(enhancement mode),而氮化鎵電晶體為空乏型(depletion mode),因此傳統的驅動電路設計無法直接應用於氮化鎵功率電晶體的驅動。 在上橋驅動電路中,其控制輸入為一具邏輯位準的輸入電壓,其輸出為一具備控制功率電晶體的高電壓,因此必須藉由「電位位準轉換電路」來將邏輯位準的電壓轉成高電壓。也由於此功能需求,傳統的「電位位準轉換電路」中的電晶體必須能承受高的電壓差,例如採用高壓製程所生產的LDMOS來製作電位位準轉換電路。本論文所提出的第一種驅動電路設計的特點在於採用電容來承受高電壓差,因此相關的電晶體不需承受高電壓差,可由一般IC製程來製作,藉此降低驅動電路的製作成本。 氮化鎵電晶體的特性與其電壓崩潰機制與閘極漏電流密切相關。本論文所提出的第二種驅動電路的設計特點在於在驅動電路中包含電流限制電路來限制閘極漏電流,並進而提升氮化鎵電晶體的崩潰電壓。 此兩種驅動電路皆透過SPICE模擬,並完成實驗驗證。在第一種驅動電路設計中,我們成功製作24V、10kHz 的上橋驅動電路,實驗證明驅動電路中的電晶體皆不需承受高電壓差。在第二種驅動電路設計中,我們完成限流電路的設計與製作,並實驗證明具備限流功能。惟氮化鎵電晶體的崩潰電壓提升有限,僅10V左右。
This study proposes two gate driver designs for the AlGaN╱GaN HEMT power transistors. A full bridge power control circuit consists of a high-side bridge and low-side bridge. And, in order to improve the performance, the power transistor in the high-side bridge is N-type. This would make the source of the power transistor floating and complicate the high-side gate driver design. Besides, most of the gate driver circuits are designed for the enhancement mode power transistors. However, the AlGaN╱GaN HEMTs are depletion mode transistors. Thus, the conventional gate driver designs cannot be directly applied to drive the AlGaN╱GaN HEMT. The power transistor in the upper bridge controls the on/off of a high voltage (hundreds of volts). And, its control signals are in the level of logic signals. Therefore, a “level shifter” is needed to convert the logic level signal to a high-voltage level signal. This implies that the transistors in the level sifter must sustain a large voltage difference. Usually, these transistors, such as LDMOS, are fabricated from high-end process and thus expensive. In our first gate driver design, we use capacitance to sustain the high voltage and thus the transistors can be exempted from the high voltage. This can greatly reduce the fabrication cost of the transistors and the high-side gate driver circuit. One of the unique properties of the AlGaN╱GaN HEMT is that its breakdown voltage is closely related to the gate leakage current. Therefore, in our second gate driver design, we include a “current limiter” to constraint the gate leakage current and to boost the breakdown voltage of the AlGaN╱GaN HEMT. Both gate driver circuits are designed and simulated using SPICE, and then verified by experimental results. In the first gate driver design, the experimental results show that it can work at 24V, 10kHz. And, no large voltage drop on transistors. In the second gate driver design, the proposed circuit successfully limits the gate leakage current. However, the increase of the breakdown voltage of AlGaN╱GaN HEMT is quite limited to 10V.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079914591
http://hdl.handle.net/11536/49484
Appears in Collections:Thesis


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