銲錫厚度對錫銀銲錫接點中電遷移效應的影響

Abstract

由於銲錫凸塊的大小隨著趨勢會變得越來越小，電遷移破壞(electromigration failure)將是一個很重要的可靠性問題。3D - IC將成為一個重要的電子封裝技術及高性能結構，銲錫凸塊的高度將會下降至10微米以下。在這項研究中，我們對不同厚度的銲錫電遷移的影響進行觀察。我們的試片結構主要上端是3微米的電鍍鎳再上層是50微米的銅柱，中間Sn2.3Ag銲錫接點的高度我們利用回銲熱處理把銲錫控制在18微米，10微米，介金屬化合物開始接橋(bridged IMC)以及完全介金屬化合物(Full IMC)四種厚度，下端為27微米厚的銅墊層。利用Semi In-situ的觀測方式，通電條件為2.5× 104 A/cm2和3× 104 A/cm2的電流密度並把環境溫度設為100° C。研究的結果發現銲錫厚度越低的銲錫凸塊比較不容易出現孔洞，電遷移破壞的時間相對也比較長。

As the solder bump size becomes smaller, electromigration failure is a critical reliability issue. As 3D-IC will become an important packaging technology for high performance devices, the bump height will decrease below 10 micron. In this research, the effect of different solder thickness on electromigration failure mode is investigated. The solder joint consists four types thickness Sn2.3Ag solder joint, there are 18 μm, 10μm, IMCs (Intermetallic compounds)started bridging and whole solders become IMC. Solder joint with 3 μm electrical Ni/50 μm copper column on the chip side and 27 μm copper trace on the substrate side. The current density was about 2.5× 104 A/cm2 and 3× 104 A/cm2and the testing temperature at 100°C. The result indicates that void was easily observed in solder joints with higher solder thickness, and electromigration failure time was shorter than the joints with lower bump height solders.