標題: | 應用於無線基頻之動態取樣訊號處理研究 The Study of Dynamic Sampling Loop for Wireless Baseband Applications |
作者: | 林祐賢 You-Hsien Lin 許騰尹 陳昌居 Terng-Yin Hsu Chang-Jiu Chen 資訊科學與工程研究所 |
關鍵字: | 動態取樣;直接序列展頻;同步演算法;雙匹配器;多重路徑衰減;Dynamic sampling;Direct Sequence Spreading Spectrum;Timing synchronization algorithm;Dual correlator;Multipath fading |
公開日期: | 2004 |
摘要: | 採用直接序列展頻調變的標準包含802.11, 802.11b 以及802.11g 等無線區域網路系統。無線通訊比有線通訊多了更多的不確定性,因此,無線通訊系統的封包裡一般都會定義preamble 欄位作為接收端同步之用。在本論文中,我們利用Barker 碼展頻的preamble 欄位來消除通道中的非理想效應,例如高斯雜訊、載波頻率誤差、載波相位誤差、以及取樣頻脈誤差等等。在這些非理想效應加成下,會導致接收器的訊號會失真,所以我們提出的演算法並須可以在高斯雜訊、和多重路徑…等通道效應下,正確、有效的可以解出並補償取樣頻脈誤差。
因此,本論文所提出的演算法,以使接收器只需要利用PLCP 中的preamble 欄位就可以得知通道的重要參數,而不須MPDU 的任何協助,此法可減低互補編碼(CCK)解碼器的成本,其成本佔了整個收發器的大部分。此法更對802.11g 有助益,因為802.11g 中有CCK-OFDM模式,也就是Barker 碼展頻的PLCP接上正交多工分頻(OFDM)的MPDU。
為了瞭解整個系統,我們使用Matlab 建立了系統模擬平台。我們可以觀察系統中任一訊號的波形,並且可以得知通道中的非理想效應對整個系統或某些訊號有何影響 - 此平台更可以用來驗證我們所提出的同步演算法。最後,在實作硬體部分,提出利用非同步電路設計,使電路可以獲的非同步設計好處。 Direct sequence spread spectrum (DSSS) technique is used in IEEE 802.11, 802.11b and 802.11g wireless LAN systems. Unlike the wire channel, wireless communication uses radio as its medium and has more uncertainty with it. Therefore, WLAN frame format generally contains preamble field for synchronization. In this thesis, use the Barker spread preamble field to eliminate non-ideal channel effects including Additive White Gaussian Noise (AWGN), carrier frequency offset (CFO), carrier phase offset (CPO), and sampling clock offset. Therefore, the signal is degraded under non-ideal channel effects, and the exact and effectual timing synchronization algorithms were proposed. By the proposed algorithms, the baseband receiver can extract all the channel parameters only with the PLCP preambles and does not need any help from the MPDU which will reduce the CCK demodulator cost, dominated the cost of the system. In addition, the proposed algorithms can benefit the IEEE 802.11g system, which includes the CCK-OFDM signal flow - PLCP frame consists of the Barker and OFDM MPDU. Some simulation results, based on the proposed Matlab platform, have shown in this thesis. Finally, architectures of key components are discussed with gate counts of listed as well, where asynchronous-circuit techniques are used to implement the proposed architectures. |
URI: | http://140.113.39.130/cdrfb3/record/nctu/#GT009117602 http://hdl.handle.net/11536/50435 |
顯示於類別: | 畢業論文 |