耐放射線/輻射線之半導體基板SOI之研製

Abstract

絕緣體矽(Silicon On Insulator簡稱SOI)技術是半導體技術中最看好 被應用在太空的積體電路製造技術,我們即成功了利用矽晶片直接黏合技 術完成耐放射線之半導體基板SOI的製作.影響矽晶片直接黏合技術成功的 重要因素有二,一 是黏合界面品質,另外則是薄化 (thinning ) 技術品 質.在本文中,我們利用電性評測成功地證明其界面缺陷密度到達1E10~1 E11 (eV-cm2)-1,漏電流和崩潰電場和一般熱氧化法成長的SiO2界面差異 不大.並且利用高解析度穿透式電子顯微鏡直接探討黏合界面品質.此外, 在薄化技術中,我們亦成功地薄化至1um以下,並且製作出元件隔離結構.為 了適應將來的低溫製程,我們利用固相成長及液相沉積氧化層成功地應用 在黏合技術,完成研製SOI基板.其中處理過程,膜質特性及黏合界面的觀 察,亦是本論文的重點之ㄧ. Silocon-On-Insulator(SOI) technology is the most promising method to be apploed to the fabrication of integrted circuit in aerospace. We have succesfully acomplish the fabrication of rad- iation-harden SOI substrate using silicon-wafer direct bonding technology in the theiss. There are two important factors to achieve sucessful wafer bonding technology. One is the quality of bonded interface, the other is thinning technology. In this paper, the interface trap intensity is approved to be 1E10~1E11 (eV*cm)-1 in electrical analysis. The leakage current and breakdown field is as good as that of thermally-grown Si/SiO2 interface. Bonded interface observation under high resolution transition electron microscope (HR-TEM) is also investigated. In the thinning process, we also successfully thin the SOI wafer down to submicron device layer, and fabricate the device isolation structure. In order to apply the technique to low temperature process, wafer bonding with liquid phase (LPD) oxide to fabricate SOI substrate is succesfully developed in this research. The treatment process, film characteristic and bonded interface observation is one of the key topics in this thesis.